The Shaughnessy Report: Squeezing Seconds Out of the Design Cycle

Estimated reading time: 1 minute

It’s almost that bad, isn’t it?

When you’re designing a board, time is always your enemy. Your deadline is around the corner, and you can’t be late. (You’re going to catch the blame anyway, even if it’s not your fault.) So you constantly look for ways to shorten your design cycle, even if it means squeezing out a few seconds here and there.

That’s what we learned when we surveyed our readers recently. PCB designers said that time pressure was one of their least favorite parts of the job, and in some cases, they were ready to retire just to avoid design cycle challenges. I imagine that many of you near retirement, and that’s quite a few of you, feel the same way.

In the survey, we started by asking readers to rank the importance of reducing their companies’ PCB design cycles. A total of 88% ranked reducing the design cycle at least a 7 on a scale of 1–10.

We decided to cut to the chase. We asked, “What are the biggest bottlenecks in your PCB design cycle?” The answers were illuminating: 

• The design is not ready for layout when we get it
• Schematic finalizations
• Customer unknowns
• Engineering changes
• Library updates
• Procurement of samples (a slow purchasing department)
• Footprint validation
• The PCB designer 

Then we asked, “What tools or methods do you use to accelerate your design cycle?” I expected to hear about lines of spreadsheets or proprietary processes, but check out these replies: 

• Do it right the first time
• Reuse of designs
• Mentor Xpedition
• Cadence Allegro
• PADS
• HyperLynx
• Use our normal app but try to stay on top of app improvements
• Inside tools
• Third-party software enhancements to CAD tools
• No unnecessary meetings— most are a waste of time
• CAD DRC rules
• CircuitSpace, script automation (dalTools), wearing multiple shirts, overtime
• 3D printers

To read this entire article, which appears in the October issue of The PCB Design Magazine, click here.