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Current power demands are increasing, especially with AI, 5G, and EV chips. This month, our experts share “watt’s up” with power integrity, from planning and layout through measurement and manufacturing.
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If you don’t have signal integrity problems now, you will eventually. This month, our expert contributors share a variety of SI techniques that can help designers avoid ground bounce, crosstalk, parasitic issues, and much more.
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SiSoft to Present, Exhibit at DesignCon 2017
January 18, 2017 | SiSoftEstimated reading time: Less than a minute
SiSoft will be exhibiting and presenting papers at DesignCon 2017. Visit the SiSoft booth #935 next Wednesday and Thursday, February 1-2, 11:00am - 6:00pm.
Pragmatic Signal Integrity Boot Camp
January 31, 9am - 4:30pm
"AMI Model Development from SerDes Design - a Practical Approach"
Tutorial presented with MathWorks
January 31, 1:30pm - 4:30pm
"Getting the Most from IBIS-AMI: Tips and Secrets from the Experts"
Technical panel
January 31, 4:45pm - 6:00pm
"A Beginner's Guide to SerDes and AMI Modeling"
A 40-minute sponsored session presented with MathWorks
February 1, 10:15 - 10:55am
"Application of Pulse Response Extraction to Nonlinear Data Channels"
Technical paper
February 2, 2:00pm - 2:45pm
Engineer of the Year Panel Discussion
45-minute panel discussion
February 2, 3:00 - 3:45pm
IBIS Open Forum Summit
"Things You Can Learn from a Pulse Response"
February 3, 10:15am
For more information, visit www.sisoft.com or www.designcon.com.
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