Global PCB Connections: Following DFM Rules Leads to Better Boards
Elementary Mr. Watson: How to Reinvent Your Professional Journey
Fresh PCB Concepts: PCB Plating Process Overview
Orange County Chapter of IPC Designers Council Lunch 'n' Learn Meeting July 19
July 5, 2017 | Orange County Chapter of the Designers CouncilEstimated reading time: 2 minutes
For our July Lunch ‘n Learn meeting, we’re going to explore the advances in embedded passives, which can benefit many designs today. We have two guest speakers with informative presentations to educate us on this important and growing technology trend.
Date: Wednesday, July 19, 2017
Time: 11:30 am - 1:30 pm
Where: Clifton C. Miller Community Center in Tustin (Note the special location for this meeting)
Speaker 1: Bruce Mahler, Vice President of Ohmega Technologies, will present “Embedded Thin Film Resistors—An update on Current Applications and Designs”
One of the PCB designer’s tools is embedded passives, which can free up routing area, reduce assembly, improve reliability, improve electrical performance, and for some designs, reduce the cost of the assembled board. OhmegaPly is an embedded resistive material that has seen growing use in a variety of electronic systems, including high-frequency RF circuits, MEMS sensors and heater elements. This presentation will provide an overview of the thin film resistor technology including its production, product offerings and characteristics. Examples of current OhmegaPly designs will be reviewed and will be followed by a discussion of future trends for embedded resistors in PCBs.
Speaker 2: Jin-Hyun Hwang, Applications Development Engineer at DuPont, will present “Improving Power Delivery Networks (PDNs) Using Polyimide-based Thin Laminates—What PCB Designers need to know about Buried Capacitance”
This presentation will provide an overview of the use of thin laminate products (i.e., buried capacitance, a pair of power/ground layer pairs) designed for the power distribution design options. The presentation will discuss the use of both 1-mil and 0.5-mil dielectric laminates and the benefits of each. Buried capacitance layers can reduce the number of decoupling capacitors, free up design space, reduce noise and create higher reliability, along with many other benefits. Example stack-ups from high layer-count PCBs used for server and telecommunications equipment will be shared. Also, process challenges at fabricators will be addressed.
Reserve a spot on your calendar on Wednesday, July 19 from 11:30 am to 1:30 pm for this educational “Lunch ‘n Learn” meeting event.
Location:
Clifton C. Miller Community Center
300 Centennial Way
Tustin, CA 92780
Cost: The cost to attend this Lunch ‘n Learn event will be $10 at the door to help cover the lunch cost.
Please RSVP no later than noon on Tuesday, July 18
- To RSVP, click here
- Or email your RSVP to terri_kleekamp@mentor.com
I look forward to seeing you there!
Scott McCurdy
President, IPC Designers Council - Orange County chapter
Freedom CAD Services
cellphone: 714-425-3235
email: scott.mccurdy@freedomcad.com
www.ocipcdc.org
Share on:
Suggested Items
IPC Announces New Training Course: PCB Design for Military & Aerospace Applications
12/23/2024 | IPCIPC announced the launch of a new training course: PCB Design for Military & Aerospace Applications.
Zhou (Peter) Guoyin: Pioneering the Standardization of ESG
12/23/2024 | Chuck Li, IPC AsiaWith more than 30 years of experience in corporate social responsibility (CSR) and environmental, social, and governance (ESG), Zhou (Peter) Guoyin has not only witnessed the evolution of CSR and ESG globally but has also been a key force in driving their development. As chair of the IPC-1401 standard committee, Zhou has led numerous innovative projects over the past 11 years and was awarded the SEDEX Supply Chain Impact Award in August 2024. In this exclusive interview, he shares valuable insights into the ESG field and the profound impact of IPC-1401 on the electronics manufacturing industry.
Are Our Stackup Rules No Longer Valid?
12/19/2024 | Cherie Litson, EPTAC MIT CID/CID+Are the stackup rules we used to follow no longer valid? It depends on what you’re designing. Electrical rules change depending on your circuit. Fabrication rules change depending on which fabricator you’re working with. Today, we just have more options, and sometimes, cost is a bigger rule than anything else. If you search online for information about layer stackups, trace widths, and hole sizes in PCBs, you’ll find a variety of resources.
IPC/WHMA Launches Groundbreaking Online Course on Wire Harness Design
12/18/2024 | IPCIPC/WHMA is excited to announce the launch of its new online instructor-led training course, "Introduction to Wire Harness Design I," available now through the IPC EDGE Learning Management System.
IPC Releases Latest List of Standards and Revisions
12/17/2024 | IPC Community Editorial TeamEach quarter, IPC releases a list of standards that are new or have been updated. To view a complete list of newly published standards and standards revisions, translations, proposed standards for ballot, final drafts for industry review, working drafts, and project approvals, visit ipc.org/status. These are the latest releases for Q4 2024.