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Signal Integrity: The Experts Weigh In
November 14, 2017 | The I-Connect007 TeamEstimated reading time: 2 minutes
When we began planning our issue on signal integrity, we arranged a conference call with a variety of industry experts. Mike Steinberger of SiSoft, Mark Thompson of Prototron Circuits, and Yogen and Sunny Patel of Candor Industries joined editors Andy Shaughnessy, Patty Goldman, Happy Holden and Publisher Barry Matties on the call for a spirited discussion about the challenges related to signal integrity and some of the tricks of the trade for helping ensure SI.
From the Front End
Steinberger began by sharing two issues he’s been studying, one large and one small. “The large point is in the analysis of error-correcting code performance on high-speed serial channels. When you look at the drive toward PAM4, it is absolutely essential that you bring error-correcting codes along. The fact of the matter is that, when you have a fair amount of margin, NRZ does better than PAM4; but when you start reducing the margin, the PAM4 bit error rate doesn't degrade as quickly as the NRZ bit error rate degrades. So when you're starting to get the minimum amounts of margin, then FEC is the way to go. But it's FEC operating in a condition where it's got a relatively high error rate. So error-correcting codes come as an essential technology along with PAM4.
“But I think that the benefits of error-correcting codes have been oversold, in that the performance analyses for error-correcting codes have been based on assumptions that are appropriate for radio channels, like where you have a lot of added noise--so a satellite channel or something like that. Therefore, the errors are completely uncorrelated. On high-speed serial channels, the errors are more correlated than that, and people have not done the performance estimate while taking this correlation of errors into account. I did some simulations and was able demonstrate that the correlation of errors is due to the inter-symbol interference. Eventually, accurate estimation of error-correcting code performance on high-speed serial channels is going to become a thing in itself. I ran into someone from Cisco at DesignCon who was ready to have that conversation.
“A smaller thing, but also important: Suppose you have a transmission line that's going over a ground plane. It gets to a certain point and there's a cutout in the ground plane. What happens when the transmission line hits that discontinuity? There are return currents flowing in the reference plane and those currents have to go some place. Well, now, the return currents aren't going to flow all the way around this discontinuity to meet up at the other side. It turns out what the return currents do is transition to whatever the closest plane is, regardless whether you have a return via or not. So, you don't need ground vias to have this transition of the return current occur, and it turns out that there is a very simple formula for what amounts to an inductance that the return current goes through when it transitions from one reference plane to another. This is a piece of knowledge that all signal integrity engineers should understand, and basically none of them do. No, you're not going to get it from a 3-D field solver; you get it from closed-form equations.”
To read this entire article, which appeared in the October 2017 issue of The PCB Design Magazine, click here.
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