EIPC Winter Conference 2024, Day 1: A Grab-bag of Technical Topics

Estimated reading time: 15 minutes

The 2024 Winter Conference of the EIPC took place January 30 and 31 at the IHK Academie in Villingen-Schwenningen, Germany. The keynote session will be reported separately. Here is my review of the first day’s conference proceedings.

Dr. Hayao Nakahara and Andreas Folge introduced the IC substrates topic in their keynote presentations in the session on substrate supply chain opportunities, moderated by Thomas Michels, CEO of ILFA in Germany. It began with a presentation from Dr. Roland Steim, applications engineer with Dyconex in Switzerland. Dyconex is a member of the Micro Systems Technologies group, one of whose specialities is IC substrates, and Steim addressed manufacturing and supply chain challenges. 

Increasing I/O counts drove a requirement for more layers and denser interconnect, decreasing yield. Heterogeneous chip integration has increased substrate size, potentially decreasing the yield. And the change from silicon or ceramic through-via interposer to organic interposer in the interest of cost saving has posed further manufacturing challenges. Improvements in cleanliness and no-touch handling systems required substantial investment, and Steim queried whether the EU Chips Act really recognizes this. Similarly, he queried whether the supply chain has been properly considered in an industry characterised by high volumes. Does the corresponding customer volume exist in Europe? In view of the high cost of labour, are the resources available to invest sufficiently in automation?

The European supply chain can realistically offer low volume, high-mix and highly specialised product at standard-technology levels for medical implant packages, small medical class 2 packages, special or small RF packages, and automotive LIDAR. At the advanced technology level, there is scope for LGA/FCBGA for advanced computing, process reliability monitoring boards, system-relevant telecommunication based on LCP packages, critical aviation and ITAR, and R&D for early-stage development of Quantum computer substrates.

Steim showed a roadmap for flip-chip-ball-grid-array (FCBGA) substrates, with die sizes trending from 10x10 mm in 2023, through 15x15 mm in 2024 to 30x30 mm in 2025, with corresponding bump pitches trending from 150 micron to less than 100 microns. His corresponding materials roadmap trended from woven-glass BT-epoxy to non-reinforced Ajinomoto build-up film, and he illustrated with examples of thin BT-core, thick BT-core, and Ajinomoto build-up constructions. He commented that sequential build-up needs more time to manufacture than parallel build-up (typically twice as long), and that larger panel formats offer more capacity at the risk of lower yield. 

He discussed the pros and cons of classic in-house development vs. the more modern strategy of development in collaboration with the customer. He discussed the consideration of details of the current solder mask and solder-on-pad requirements and when to strike a compromise between line width and type of copper treatment when seeking to balance the challenge of optimizing peel strength while maintaining good pattern definition. He concluded with comparisons of mechanical and pico-laser techniques for via-hole drilling and for de-panelling. 

Dr. Thomas Gottwald, Schweizer’s VP of technology, explained the principles of his company’s “p² Pack” concept for the embedding of power semiconductors into PCBs and described how the technology has been successfully introduced into the automotive industry where it has enabled significant improvements in the energy efficiency of traction inverters in next-generation electric vehicles.

He further explained that embedding power components offers the primary benefits of miniaturisation, higher power density, higher efficiency, lower losses, higher reliability and better heat dissipation. The prerequisites are that the semiconductors have copper terminations and are suitable for silver sintering or diffusion soldering.

Gottwald made it clear that p² Pack technology is not simply a new packaging method but it enables a different approach to the development of power electronics systems. His target cooperation model indicates Schweizer’s position in the supply chain, receiving singulated power components from the semiconductor vendor or an OSAT company, processing them through “p² Pack & Test,” finishing the assembly through “Smart p² Pack & Test,” then collaborating with the semiconductor vendor in sales, supply management, and quality management functions with a joint qualification and support team. He explained that the production chain for system suppliers and the lay-up and interconnection technology in the system are greatly simplified as a result. In addition, there are potential cost savings at system level.

He showed examples of first- and second-generation constructions for low-voltage and high-voltage operation, respectively, with test results demonstrating efficiency increases and improvements in switching characteristics and thermal resistance. The third-generation construction, currently in pre-development, is based on ceramic rather than copper lead frames, with built-in ceramic high-voltage insulation. 

Dr. Karsten Andrä, regional marketing manager with KLA-Orbotech in Belgium, discussed the benefits of advanced monitoring of wet processes for high-end organic substrate manufacturing. 

He explained that while the complexity of semiconductor devices continues to increase, requiring increasing density of connection between the active chip and the circuit board, the drive to reduce the cost of the interconnecting component has resulted in certain PCB manufacturers developing IC substrates based on organic laminates, although with much finer structures than normally seen in PCB designs. 

These IC substrates are manufactured using chemistries and plating processes similar to those used in PCB production, and process control has become a critical issue. Andrä advocated the use of online process monitoring to enable closed-loop process control between process line, analyser, and dosing devices, resulting in narrower process windows, higher frequency of analysis, reduction of human errors, improved traceability, and reduced consumption of chemicals. He commented that although KLA has 30 years of experience in chemical metrology in the semiconductor and related industries, they have observed that using their analyzers in PCB environments also presents some unexpected challenges. 

He showed examples of online monitoring systems for electroless and electrolytic metallization process applications in wafer-level and panel-level packaging, commenting that these have been standard in the semiconductor industry for more than 20 years. He then reviewed a series of specific examples of metrology for major wet process steps in panel-level packaging: desmear, electroless copper, copper electroplating, and final finishes, with details of chemistries and analytical methods. 

It has been shown that online metrology for metal deposition processes resulted in improved process yield, especially for challenging substrate production. Leading IC substrate manufacturers are using process analysis and monitoring equipment in their most advanced production facilities 

Delegates returned to their seats after a lively coffee-and-networking break to learn about developments in process and material technology for next-generation products in the session moderated by John Fix of Taiyo America.

First to present was Mustafa Özkök, global product manager with Atotech Deutschland, discussing the latest vertical electrolytic copper plating solutions for PCB production from the viewpoint of a system supplier offering integrated packages of equipment and chemistry. 

In this instance, he focused on a vertical copper electroplating system designed to give optimum results in advanced manufacturing technologies, such as SAP and mSAP and applicable to a range of PCB types, from standard multilayer and HDI to advanced HDI, rigid-flex and IC substrates.

The system he featured offers touch-free processing of thin panels using automatic loading and unloading. Reverse-pulse plating and high solution exchange gives it through-hole filling and high throwing-power capability with excellent uniformity. Using insoluble anodes with cathode shielding, its DC rectifier option enables high throughput with current densities up to 5 A/sq dm. It also provides control of all relevant process parameters together with recipe control, chemical process control, and traceability, in addition to Smart factory integration and a high level of automation.

After explaining the features of the system in detail, Özkök showed a series of test results demonstrating the superior performance of the system, particularly in terms of uniformity of distribution and via-filling capability. A short-term target was to establish high volume manufacturing while filling vias with aspect ratio up to 3:1 for standard substrates. The mid- to long-term target was to achieve better than 3:1 and to include glass substrates. Feasibility studies were in progress for filling high-aspect ratio through-glass vias.

Taiyo America continue to develop high performance materials for HDI applications, and Harald Kutzias, their European-based technical service engineer, gave a detailed step-by-step account of the development a new via-filling material. 

He explained that such materials are needed to prevent corrosion of the via connection, to improve vacuum performance at in-circuit test, to prevent contamination under components, to gain back outer-layer space when plated-over and, in sequential builds, to fill buried vias without voids and reduce pre-preg resin loss. 

Performance targets to be achieved: to closely match the thermal expansion characteristics of low-CTE substrates, closely match the Tg of new substrates, provide excellent thermal cycling performance, make visual inspection easier during hole filling, and to maintain the process characteristics of standard products. It was aimed to achieve a glass transition temperature above 155°C to reduce shrinkage on curing, and to withstand 1000 thermal cycles of -65°C to +150°C without cracking.

Resin systems, curing systems, and filler systems were studied and evaluated to enable proper selection and optimisation. An epoxy resin was chosen for its excellent chemical and heat resistance, selected in conjunction with a curing system capable of satisfying the objectives of optimised crosslink density, high glass transition temperature, high modulus, and low shrinkage. Pot life and shelf life are important further considerations. The filler system is a significant contributor to thermal expansion, shrinkage, modulus and tensile strength characteristics, and it was chosen and optimised in terms of loading, packing density, particle size, particle shape, and hardness.

The resulting formulation is a single-part, thermally cured, 100% solids material, which exhibits the highest Tg available at 173°C and the lowest CTE available at 32/115ppm. It has a shelf life of 12 months at -10°C.

Anthony Pascalet, process engineer with AGC Multi Material Europe in France, introduced AGC’s range of PCB materials and discussed the details and characteristics of their ultra-low-loss bond ply and build-up film in high-reliability HDI applications. 

He commented that many of the material challenges posed by high density interconnects have been addressed by the properties of their build-up films, which exhibit high flow and fill. One ply is sufficient to encapsulate circuitry between sequential laminations to avoid chemical infiltration, with sufficient copper adhesion to survive all fabrication steps. Furthermore, the material exhibits good lasability for via formation and a wide enough process window to account for varying thickness resulting from uneven copper distribution, together with temperature stability through many sequential laminations.

Key attributes are uniformity of thermal expansion coefficient in X,Y, and Z axes, and low modulus to reduce stress on bare dies and packages. A uniform resin filler and the absence of glass reinforcement enables improved micro-via formation, and the material is self-levelling to ensure uniform flat surfaces.

The material is available in film thicknesses of 38, 51, and 64 microns, and as resin-coated copper with resin thicknesses of 33, 75, and 81 microns. The high-frequency grade has a dissipation factor of 0.0019 at 10GHz. 

There are many applications in HDI build-up multilayers and interposers, via filling, and bonding together of subassemblies. 

Returning after lunch, delegates were welcomed by Martyn Gaudion to facilitate the session on sustainable PCB processing opportunities and roadmapping. 

His first speaker was Mark Edwards, strategic account director at MacDermid Alpha in the U.S., who discussed the environmental benefits of closed-loop rinse water recycling in metallization processes. 

“Sustainability is real and no longer just a buzzword,” he said in his opening statement. He commented that large OEMs have set sustainability goals, suppliers are being pushed to improve, and there is an opportunity in the PCB supply chain that is available and easy to implement. He identified direct metallisation as addressing multiple sustainability goals in parallel and which, with the addition of a zero liquid discharge system, will further reduce water consumption and eliminate mystery contaminants.

Stressing the fundamental need for primary metallisation in PCB fabrication, he demonstrated that direct metallisation requires fewer than half the process steps compared with electroless copper, and he detailed the attributes of the process, particularly the substantial reductions in power consumption, water usage, and waste treatment. Its significantly smaller carbon footprint offers the potential to reduce yearly global CO₂ output by approximately 700,000 tons if all PCB fabricators are to use direct metallisation.

Edwards examined the impact of a zero-liquid-discharge system in the context of closed-loop water recycling and chemical consumption, comparing the benefits and limitations of “in situ” vs. “end of pipe” approaches. He introduced a proprietary system offered by MacDermid Alpha, specifically designed for their own direct metallisation process and capable of achieving a 90% reduction in chemical consumption and waste treatment.

Insoluble anodes and equipment for onsite copper recovery at PCB manufacturing plants was the subject of a joint presentation from Jacko Pijper, global business manager at Optimum Anode Technologies in the Netherlands, and Andreas Littorin, CEO of Sigma Engineering in Sweden, supplier of equipment for copper recycling in the PCB manufacturing process.

Pijper described the manufacturing process for insoluble anodes, generally fabricated from titanium and coated with precious metal electrocatalysts of which iridium oxide is a major component. 

Comparing the characteristics and limitations of soluble vs. insoluble anodes in the electroplating process, he explained that as a soluble anode dissolves, its geometry changes and affects the homogeneity of the plated deposit. Also, the copper concentration in the electrolyte varies, copper sludge is formed, and continuous handling is required. With an insoluble anode, copper is dissolved separately and the anode is dimensionally stable, except for microscopic wear on the coating. Anodes can be shaped to application and a smaller anode-to-cathode gap is possible. Energy consumption is less, plating homogeneity is stable and copper concentration is controlled, although a separate dissolving station is required.  

Pijper explained that equipment for copper recovery from PCB waste streams typically employs iridium mixed-metal, oxide-coated titanium anodes, shaped to the process requirement. While copper is deposited at the cathode, oxygen is generated at the anode. But if there is a high concentration of chloride, such as in a spent etchant, chlorine is generated which corrodes the titanium. This limitation is overcome in Sigma’s MECER process, which was described by Andreas Littorin. 

Littorin commented that, depending on the size and production volume of the PCB plant, the amount of copper etched away might range from a few kilograms to several hundred kilograms every day, and it is possible to recycle it onsite without relying on external reclaimers. He explained that Sigma’s MECER process uses a combination of solvent extraction and electrowinning. Copper ions are removed from the spent etchant by mixing it with an organic carrier. Then, in a separate process, copper is stripped from the organic carrier into a sulphuric acid electrolyte and transferred to an electrowinning unit. Cell resistance is kept to a minimum, using mixed-metal, oxide-coated titanium anodes. By starting with copper cathodes, there is no need to manually strip the plated copper, and they can instead be kept inside the cell for several weeks until a target weight is achieved. Purity levels better than 99.9% can be achieved and the recovered copper has a high resale value. 

EIPC technical director Tarja Rapala-Virtanen gave the final presentaion of the first day with an overview and update on the iNEMI roadmap, particlarly with regard to the subjects of sustainability and PCBs, commenting that a new approach to roadmapping had been adopted. The overall vision was to influence technology investment decisions by moving to shorter online documentation, updated in real time by a diverse community of experts. The vision for the printed circuit board recognised it as a fundamental and essential element of electronic technology that is the foundation for all electronic products. For the printed circuit board to satisfy the increasing requirements of the products of tomorrow, PCB manufacturers need to continuously evolve and react to a wide variety of technological market and regional demands. The era of artificial intelligence adds a new dimension to the demands of the market, driving the complexity of PCB attributes.

She stated that the present-day roadmap has seven active teams and more than a hundred contributors, covering the areas of millimetre-wave materials, Smart manufacturing, PCBs, board assembly, sustainable electronics, packaging and heterogeneous integration, and power conversion electronics. 

Regarding sustainable electronics, the iNEMI roadmap considers reponsible supply chains, materials and toxicity, energy and circularity, and all their interactions and impacts with people and society, ecosystem, climate and resource depletion, with the overall objectives of sustainable electronic solutions, and workforce development. The sustainable electronics roadmap contents include a holistic overview, circularity and materials in its first release, with responsible supply chains and energy in its second release. 

The five key drivers of PCB technology evolution are “smaller”: finer lines, microvias and thinner dielectrics; “faster”: higher throughputs, higher frequencies, and greater bandwidths; “hotter”: greater power transfers and higher operating temperatures; “greener”: factory operations with a smaller ecological footprint; and “cheaper”: lower cost point for given functionality and performance. 

The PCB roadmap contents include high speed, substrates, test inspect and measurement and environmental in its first release; microwave and millimetre-wave and laminates in its second release; and new design, flex and rigid-flex, optical and embedded components in its third release.

After a short interlude, coffee, networking and a look at the table-top exhibits, delegates grabbed their coats and boarded the buses for a half-hour ride to the Schweizer Electronic PCB and embedded component factory in Schramberg. 

Following the factory visit, it was back on the bus to the splendid Restaurant Aichhalder Mühle for a convivial networking dinner and afterwards return to the hotel in Villingen-Schwenningen for a good night’s sleep in preparation for the second day’s programme.

Many thanks to Alun Morgan for the images.