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Greetings from “balmy” Santa Clara, where DesignCon 2026 is officially underway. The conference began in 1995 as Design SuperCon, and now in its 31st year, remains Silicon Valley’s annual summit for signal and power integrity pros.
As I walked into the hotel next to the Santa Clara Convention Center, I could sense echoes of the thousands of football fans who packed the area just weeks ago for the Super Bowl. For me, though, DesignCon is the big game, where our industry’s MVPs take the field to show how fast the technology playbook is evolving. I’ve attended DesignCon since the first Santa Clara show, and yes, there was once a homemade “Chiphead” mask involved.
PAM6 and the 448G Reality Check
On Day 1, I joined a PAM6 tutorial led by Advanced Micro Devices (AMD) engineers Geoff Zhang and Peijun Shan.
I am happy to say that the message was more pragmatic than “PAM6 solves everything.” The presenters indicated that if we want 448 Gbps, we must rethink the tradeoffs we’ve grown comfortable with since PAM4 first rattled nerves.
This was an entirely new area of exploration for me and the reason I attend DesignCon. As I frantically scribbled notes, I gathered they were positioning PAM6 between familiar extremes:
- PAM2 (NRZ): Simple, wide margins, limited throughput
- PAM4: Doubles bits per symbol, halves eye height
- PAM6: A middle path, improved spectral efficiency without the severe margin penalty of PAM8, but with added DSP complexity
- PAM8: High density, razor-thin noise margin, steep linearity and power demands
They also compared PAM6 to higher-order and coded approaches:
- DMD32: Multi-dimensional signaling to redistribute information efficiently
- QAM32: Amplitude + phase modulation, common in RF domains
- C32 / FC32: 32-level coded schemes to improve robustness
- Enhanced FEC (KP4/KPR variants): Because as margins shrink, math becomes mission-critical
All in all, our experts conveyed that 448G isn’t just a modulation challenge, it’s system co-design. Analog front ends, equalization, coding, and FEC must move together. Every dB counts.
Keynote: From Backplanes to Quantum Highways
Our Day 1 keynote, introduced by longtime DesignCon host Susanne Deffree, shifted from copper to quantum.
Joseph Lukens, associate professor at Purdue University, explored the nonlocal predictions of quantum entanglement, a topic famously debated by Albert Einstein. Lukens outlined a vision for a “quantum information superhighway,” drawing parallels to today’s classical internet and its potential to transform how we measure, transmit, and process information.
Packed Rooms, Full Playbook
Afternoon sessions delivered everything from 2-port impedance measurement master classes to 224G/448G architectures, ESD protection, PCB stackups, Viterbi decoding, Agentic AI, and SERDES deep dives.
Despite weather-caused travel disruptions stemming from the East Coast, the ballrooms were full. Day 1 closed with the traditional welcome reception: networking, reconnecting, and a well-earned reset before tomorrow’s early kickoff.
Day 2: The Shift to Agentic AI
The pace of Day 1 was non-stop, and Day 2 proved just as strong. As soon as the activity timer hit 8 a.m., the conference sprang to life. Aisles between the meeting rooms and tutorial ballrooms were filled with a steady stream of attendees.
It also appeared that many who were delayed by early travel disruptions finally made it to California. Several people shared stories with me of rerouted flights and last-minute airport changes. Gary “Kaken” Lytle from the Cadence team described quite the journey: shoveling snow, enduring six canceled flights, and nearly giving up before hitching a ride with passing snowmobilers who dropped him at an open airport two hours north. I spotted him on the show floor later, energized and none the worse for wear.
Previewing the morning’s tutorial lineup, I counted no fewer than 84 offerings on Wednesday alone. The range of topics is too extensive to list here, but they’re all easily accessible through the DesignCon show planner app.
The day’s keynote, “Agentic AI for Chip Design,” was presented by Mark Ren, founder of Agentrys. Ren described a shift from simple AI assistants—copilots—to Agentic AI: autonomous systems capable of reasoning, using tools, and executing complex workflows with minimal human intervention. Modern chips, he explained, have grown too complex for humans to optimize manually at scale. Agentic AI is essential to sustaining the industry’s rapid innovation cycles by automating the most tedious and resource-intensive aspects of design.
The themes of this unique show, held during uniquely challenging times, invite reflection. The physical challenges faced daily by the average DesignCon attendee, whether in an office, lab, or research institute, revolve around mastering forces we often cannot see. As I scanned the keynote audience or moved with the “herd” toward the next class or the bustling exhibit hall, I was struck by how the language of electronics shapes not only our work, but our shared experience.
Electronic performance depends on our ability to understand, measure, and control energy, something fundamentally invisible. There are many levels of mastery in the theories that help us navigate this unseen world, and yet we’re all here to keep learning.
Regardless of our level of expertise, we all recognize the terms that define our discipline -- and, in many ways, the journey that brought us here: resistance, modulation, speed, noise, isolation, tariffs, adaptivity, time, and mitigation.
The struggle is real, but the payoff is great.
Kelly Dack is an expert PCB designer and trainer with a long history in the industry. He is a senior application engineer at Pioneer Circuits in Southern California and an I-Connect007 columnist.
