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The Bare (Board) Truth: What Happens to Your CAM Files?
Have you ever wondered exactly what happens to your CAM files once they go to a fabricator? In today's column, I will attempt to explain a few of the standard edits made by a fabricator and what they mean to the end-user. So, what types of edits get done to the artwork files before processing?
One of the first edits done in a typical CAM department prior to fabrication of the PCB is an etch compensation. This is an increase in feature size of the artwork that includes all lines, pads and other features in copper grown to account for the known loss at an etcher. The general rule of thumb is for every half ounce of starting copper, a fabricator will do a half mil of etch compensation to the artwork so that after etch the lines' features are at the original size. For example, a 0.005 line with a 0.005 space on 1 ounce copper start would then have a 0.001 mil etch comp on the artwork so the lines PRIOR to etch would then be 0.006 lines with 0.004 spaces.
Does imposing an etch compensation ever cause a problem?
Certainly it could. If the etch compensation cuts into the available airgap/space value to the point when you cannot produce the part based upon your process minimums, you may receive a phone call from the fabricator asking to start on a lighter copper weight (and, therefore, have less etch comp imposed so that available air gap or space value is not compromised).
Some of the other edits performed at a CAM stage would be removal of non-functional pads on inners. Some customers do not want this done, as it can take away from the rigidity of the layer and create lamination registration issues all its own. Removal of non-functional pads on the outers would only be applicable if the pads were either undersized or 1:1 with the intended hole size. In many CAD systems this is how a non-plated hole is defined, However, let's say a 0.125 non-plated hole exists in a land area with vias or a large pad on the surface (like a 0.5 pad for a 0.125 NPT hole). Here, we understand there is to be a connection by the screw head to the chassis so only a minimum clip over the hole size is done to the pad or land.
Some CAD systems have limitations on what pad sizes and thermals sizes can be used and are not always appropriate for the device. An example of this would be very large clearances on internal planes that cut off spoke ties of nearby thermals and create a disconnect. Here, we typically propose to reduce the relief/clearance sizes if adequate distance to adjacent planes can be maintained. The opposite of that approach would be very dense surface-mount devices where the thermal size defined overlaps and creates disconnects or isolations to adjacent thermals. If the thermals can be reduced, we will offer that. In extremely tight devices, we may suggest removing the thermal ties entirely in favor of direct connected vias.
Other edits include things like the addition of bus bars for gold tips or additional metal outside the part edge to break the tent in dry film for edge-plated type features. This is done for the processing of edge-plated type features and is typically transparent to the end-user.
What about line resizing other than etch compensations? Uncontrolled signals are one thing, but when it comes to impedance signals, again we err toward altering dielectrics before looking at altering any line sizes because, again, we do not know what current-carrying capacity is needed for the signal. Any signal or dielectric changes outside the allowed deviation are communicated to the customer for approval. This is, again, why it is so important to design for 10% deviation allowance as all fabricators are not the same. There are different derived press values for each type and pre preg ply, slightly different effective Dk numbers, different press parameters, different environmental conditions etc.
But enough of my soapbox talk about signal integrity. So, what else is done prior to manufacturing to your artwork files?
Internal layer panel Gerbers are typically scaled in both the X and Y axis based upon core thickness, and blinds are scaled by the total dielectric distance between blinds. This is an attempt to account for the known expansion/contraction that occurs in the lamination process.
In addition to this you have silkscreen clips done to the provided silkscreen artworks to ensure that no silkscreen text or features that would prohibit the assembly process will be left on the pads or surface mounts. This is typically done by using the clearances for the solder mask as the set-back for the silkscreen clip.
The typical issue here is text or designators being too close to pads/mounts or overlapping pads/mounts to the point that, once the silkscreen clip is performed, much of the reference designator is missing. In today's world, with board real estate at a premium, this can be problematic. We have seen at least two possible solutions for this. No. 1 is using a smaller text size (stroke size, character height and width) and processing as liquid photoimageable type solder mask for better resolution. And No. 2 is slightly less desirable: Moving the ref designators to a part of the board that is less populated with only a line or arrow pointing to the section of the board where the parts should exist.
Lastly, regarding sub panelized boards, if the customer does not specify the fiducial and tooling hole sizes, fabricators typically associate 0.040 - 0.060 for the fiducials with approx 0.1 - 0.150 solder mask clearances associated with them. For tooling, if unspecified, we will add a 0.125 non-plated tooling hole in each corner of the frame.
I hope this has helped to explain a few of the edits that may be performed on your output Gerber files prior to fabrication.
Mark Thompson is in engineering support at Prototron Circuits. He can be reached at markt@prototron.com.
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The Bare (Board) Truth: 5 Questions About Improving Thermal Management
The Bare (Board) Truth: Teaching the Next Generation—An Overview of Today’s University Courses
The Bare (Board) Truth: Fabrication Starts With Solid Design Practices
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The Bare (Board) Truth: Eliminate Confusion
The Bare (Board) Truth: Getting on the Same Page—A Data Story