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More CAM Edits Revealed!

In this column, I will once again discuss some of the edits made by a typical CAM department prior to fabrication. Previously, I've discussed etch compensations for copper features based on the known loss during the etch process, and inner-layer scale factors based on core thickness to achieve optimum layer-to layer registration. I have also talked about altering dielectrics to achieve desired impedances, staying close to the intended original line sizes, and edits or tweaks to line and space values to achieve impedances if altering dielectrics is not enough.

This month, I will elaborate more on inner-layer feature edits, including the addition of flow and starburst patterns and constraints for scored jobs and how we fabricate edge-plated features--holes, slots and part edges.

Addition of Flow Patterns

The lamination process bonds the cores and foils together with pre-preg or "b-stage" materials under heat and pressure. Once the pre-preg material reaches its Tg (glass transition temperature) and the pre-preg becomes gelatinous, it requires a pathway to flow off the edges of the panel and distribute evenly across the surface of the layer.

Traditionally, fabricators like Prototron have added a "dot pattern" around the parts on the panel. This is a series of offset dots in metal that allow a web path for the pre-preg to flow. This worked well when dielectrics of cores are 0.008 or thicker, because they were not dependent on the configuration of the layer itself (plane, split plane or signal) to add inherent stability to the layer.

But on thinner cores (0.005" and below), we now add what is known as a "starburst" flow pattern. This still provides a path for moving the pre-preg to the panel edges, but it also adds additional metal rigidity for the thinner cores that tend to move more during lamination. Each subsequent layer must have either the dot pattern or starburst pattern offset so that the metal "dots" do not reside over each other when stacked. 

Other Inner Layer Edits at CAM

Many times, the Gerber files we receive are created on CAD systems with certain limitations for thermal relief sizes on inner plane layers. For example, thermals are sometimes drawn so large that the arcs intersect and overlap on a series of holes, creating a disconnect to the adjacent plane for the innermost holes. In cases like this, we contact the customer and ask to reduce the thermal size to ensure that all the holes intended to connect to the plane actually do so. This is where an IPC netlist is invaluable, as the disconnects will show up in a netlist compare at CAM as broken or open nets.

Constraints for Scored Jobs

Generally, the optimum depth for a score line is 1/3 the thickness of the material being used (i.e., the overall dielectric of the parts). Approximately 1/3 of the material thickness remains as a web.

Typically the top surface width of the V groove of the score line (on an 0.062" thick part) is 0.027" to 0.030" wide, due to the depth of the score line itself. This means that with an 0.062" thick part set up for score, NO copper features can be any closer than 0.015" to the part's edge or the features will be clipped by the score blade. For a part that is 0.031" thick, the distance is less (approximately 0.009" to 0.010") from copper feature to part edge. For a 0.125" thick part the minimum copper feature to part edge distance would be approximately 0.022".

Plated Edge Features

Plated features at the board edges, such as the edge itself (less tab locations to hold it in the panel), plated half holes and slots, require unique processing so that when finally routed the metal at the part's edge does not tear out or burr. Plated half holes are drilled, and then the panels are sent through the electroless copper process (cuposit). Then the edge containing the half holes is routed. This way, no electroless copper is present along the interface edge where the plated half hole meets the unplated edge and no electroplating will "stick" to it. This eliminates tearing or burring of the plated metal at final route.

Board edges are plated by prerouting the to-be plated edge prior to electroless. Additional metal slightly larger than the router track width is added outside the plated edge at CAM, to reflect the route before cuposit (to expose the to-be plated edge). After all plating and processing is done, the tabs that held the parts in place on the panel during the edge plating process are routed.

These tabs should ideally be negotiated with the customer so that a tab is not placed when an edge must be plated.

Thanks again for you time. Please don't hesitate to contact me with questions or comments.

About the author

Mark Thompson is in engineering support at Prototron Circuits. To contact Mark, call 425-823-7000 ext 239, or click here.