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Avoid Overload in Gain-Phase Measurements

Today, most of our printed circuit boards have at least a few DC-DC converters, and some boards have many. We have a large choice when it comes to deciding what to use: we can design and build our own converter from discrete parts (called voltage regulator down or VRD) or we can buy one of the off-the-shelf open-frame or fully encapsulated voltage regulator modules (VRM). 

For low currents we can use linear regulators; for medium and high current we are better off using a switching-mode topology. Whatever circuit suits best our needs, chances are that we want to keep the output voltage regulated against changes in input voltage and load current, which in turn calls for one or more internal control loops.

There is a well-established theory to design stable control loops, but in the case of power converters, we face a significant challenge: each application may require a different set of output capacitors coming with our loads. Since the regulation feedback loop goes through our bypass capacitors (shown as a single Cout in Fig. 1), our application-dependent set of capacitors now become part of the control feedback loop. Unfortunately, certain combination of output capacitors may cause the converter to become unstable, something we want to avoid. This raises the need to test, measure and/or simulate the control-loop stability.

To read this column, which appeared in the June 2015 issue of The PCB Design Magazine, click here.