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Designers Notebook: Design for Test, Part 2

Current generations for PCB designs have increased in complexity. The product developer and assembly service provider, whether in-house or outsourced, must consider manufacturing efficiency, throughput, and process yield. While design for manufacturing is an absolute necessity for controlling manufacturing costs, design to accommodate product testing does need attention as well. The primary concern is to ensure that the end product will perform reliably without compromise.

Designing the circuit board for testability is a key requirement in meeting the overall design for manufacturing (DFM) criteria. Throughout the circuit board’s development process, the designer must contemplate the essential features required for electrical testing, testing to verify component functionality, and identifying PCB assembly defects. Imperfections discovered during testing may include defects that occur during the assembly process, opens and shorts attributed to solder operations, component placement errors, or the unknowing inclusion of counterfeit, defective or damaged components that can affect both performance and long-term product reliability.

Part two of this series focuses on three PCB assembly test methodologies:

• Functional testing
• Partitioned functional test
• In-circuit test

In determining what type of electrical testing to adopt, the product developer will need to consider production volume and specific end-user requirements. The requirements for consumer electronics differ greatly from those implemented for medical equipment, automotive, or aerospace and defense applications. For example, low-volume assemblies may only require functional testing while higher-volume assemblies or those products requiring uncompromised operation, will most likely adapt a more sophisticated test strategy.

Electrical Test Strategy
When developing a test strategy, many factors must be considered to determine which test methods will be used. If possible, a test engineering specialist will review the schematic diagram before the circuit board design begins. For example, they may suggest that the designer divides complex logic into smaller, functional logic sections; provides additional capacitor elements that enable decoupling semiconductor devices; and furnish pull-up resistors on unused logic terminals. The goal is to maximize the fault coverage, but not always at any cost.

Low volume or less complex circuit board assemblies may rely on a basic functional, “go or no-go” testing while high-volume assembly or products having greater complexity will most likely adapt some form of automated or semi-automated functional partitioning or in-circuit testing (ICT). These methods, when used together, could achieve 100% fault coverage, ensuring that no circuit board assembly leaves the factory with a potentially compromising manufacturing defect or functional fault.

Most solder process-related defects (opens and shorts) can be detected visually using magnification. High-volume manufacturing may employ an automated optical inspection (AOI) system or even X-ray inspection systems, especially suited for detecting elusive solder defects, under BGA or QFN devices, for example.

Functional Test for PCB Assembly
To physically secure the assembly for functional and partitioned circuit test applications, a dedicated fixture is developed. Electrical test will be performed with power applied to evaluate the actual performance of the finished board assembly. Access for this type of testing is typically made through an interface connector or probe interface with input/output lands dedicated to the test procedure (Figure 1).

With fewer component parts to contend with, the detection of component failures or assembly related defects will be fairly routine. When the assembly fails due to component malfunction, identified components will be de-soldered and replaced before secondary inspection and re-testing.

Larger boards with high component density will require more complex test preparations. Partition testing is commonly semi-automated, requiring a dedicated test station and access to benchtop measurement gear. This type of testing is often utilized for measuring amplifier, RF and IF (intermediate frequency), and other sensitive circuit functions. The partitioning of functions allows the operator to isolate and make specific measurements on critical circuit functions, enabling faster identification of the defects whether component level or defects related to the assembly process (Figure 2).

Additionally, the test engineer may request that the circuit board designer provide a means of disabling on-board clock functions. The purpose of furnishing this disabling capability is to expedite testing and improve test efficiency.

In-Circuit Testing (ICT)
To certify absolute assembly quality the industry commonly implements a more sophisticated electrical testing solution. The fixtures developed for in-circuit testing employ dedicated spring probe fixtures that interface with test systems pre-programmed to measure every net within the circuit board.

Preparing for assembly level testing on the board, the panel must first be furnished with tooling holes. A minimum of two non-plated tooling holes are needed to maintain a fixed position of the board under test.

Tooling hole requirements:

• At least two non-plated tooling holes must be furnished on the PCB
• Ideally, the tooling holes are located at diagonal corners of the board
• Position components and test probe lands away from tooling holes

Programming for ICT is designed to measure overall functionality, identify any component termination locations needing attention, confirm that the values specified for all passive devices are correct, and that semiconductors are functioning properly.

In-Circuit Net Access
To enable the in-circuit test system to function without compromise, 100% test probe access must be provided for every “net,” the common interface between all component terminals. Anything less than the 100% net access will compromise test coverage. The example furnished in Figure 3 represents a high-density SMT assembly requiring two-side test probe access.

Probe Designs and Test Pad Size
The minimum surface area provided for probe interface is influenced by the alignment accuracy of the test fixture to the circuit board’s test sites and the probe contactor design. The test probes furnished for in-circuit test are designed to apply uniform contact pressure at all locations. These spring-loaded contactors have a broad range of tip designs to access even the most confined test pad locations (Figure 4).

Test fixture providers note these variables are not usually considered during the initial quoting process and can impact both fixture development time and cost.

Basic ICT Requirements

• One test node per net
• Probe spacing of 2.0 mm (0.080”) preferred
• Probe spacing of 1.2 mm (0.050”) acceptable¹
• Probe land on PCB should be > 0.3 mm (.012”)
• All nodal access from one side preferred
• Double side test probe access may be required²
• Provide 1.2 mm (0.050”) probe body to device body clearance

To enable the in-circuit text fixture developers to prepare the platform for accessing each net of the circuit they will need the schematic diagram for the product, a net list, and the bill of materials defining the components reference designator, as well as each component’s physical attributes. The CAD files will determine the location and orientation of each component and the precise X-Y coordinates for test probe access.

In part three, the focus will be on boundary-scan testing, an integrated method for testing interconnects on populated printed circuit boards. An extremely rapid test method, it enables both in-circuit test coverage and system diagnostics.

References

1. The smaller needle probes are fragile and bend easily.
2. Double-sided text fixtures are typically three times in cost.

This column originally appeared in the February 2022 issue of Design007 Magazine.