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Estimated reading time: 1 minute
Quiet Power: Causal Power Plane Models
Causal and frequency-dependent models and simulations are important for today’s high-speed signal integrity simulations. But are causal models also necessary for power integrity simulations? When we do signal integrity eye diagram simulations, we define the source signals, so if we use the correct causal models for the passive channel, we will get the correct waveforms and eye reduction due to distortions on the main path and noise contributions from the coupling paths.
The details of the simulated waveforms will make a difference in the accuracy of the eye closure; in such cases the causality of the passive component models is important. At the other end of the spectrum, when we do point-of-load PDN simulations, causality today is much less important, not because we don’t care for the accuracy of the result, but primarily because the excitation signal, the signature of the current demanded by the load as a function of time, is usually not known very well. One of the areas in between, which involves PDN models and requires good causal models is when we do SI-PI co-simulation. For instance, when we want to simulate the eye closure due to simultaneous switching noise and PDN noise on memory signals, the memory excitation signals are set by us and therefore it makes sense to use good causal models for the PDN to get accurate results. This article shows you a few important points how you can achieve it.
For any interconnect which has non-negligible delay for the particular application (in technical terms: which is not electrically short), we need to use a simulation model that describes not only the interconnect impedance, but its propagation delay as well. Extrapolating from the world of lumped circuits, cascaded segments of series inductance and parallel capacitance is a simple and brute-force approach to model both impedance and delay.
To read this entire column, which appeared in the October 2017 issue of The PCB Design Magazine, click here.
More Columns from Quiet Power
Quiet Power: An Evolution in PCB Design CostsQuiet Power: The Effect on SI and PI Board Performance
Quiet Power: 3D Effects in Power Distribution Networks
Quiet Power: Noise Mitigation in Power Planes
Quiet Power: Uncompensated DC Drop in Power Distribution Networks
Quiet Power: Ask the Experts—PDN Filters
Quiet Power: Friends and Enemies in Power Distribution
Quiet Power: Be Aware of Default Values in Circuit Simulators