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Failure Analysis: A Critical Component to Process Engineering

My definition of process engineering: attempting to put together the perfect manufacturing stages to produce the desired product.

Printed circuit production includes many diverse production stages requiring a wide range of skills and knowledge to manufacture the perfect product. If you want to achieve the best possible results, every stage must be considerate and sympathetic to the requirements of the other production stages. In most factories, production engineers are responsible for only a part of the production process which can make it difficult to achieve a truly holistic approach. When things go wrong, departmentalised production can make it quite difficult to get to an accurate analysis and put meaningful safeguards in place to prevent re-occurrence.

I know very few people who would claim to have a truly in-depth knowledge of every single part of the manufacturing cycle for complex printed circuits. At the very least, individuals usually have a focus on either the mechanical or chemical aspects of printed circuit production. More often they are specialists in a single department of the circuit manufacturing set-up.

Failure analysis is a skill in itself. To do the job well you need some serious technical skills combined with the mind of a detective. If you can perform well in this arena there is an opportunity to save some serious money.

Start in the scrap bin, just about my favourite place in any printed circuit factory! There are some good systems for designating and recording the reason for scrapping a piece of material but often the decision for how to classify the reason for failure is placed on the machine operator at the inspection stages of the process. This could be at visual inspection, automatic optical inspection or electrical test, but in all of these cases the person who is completing the records of scrap data and putting the product in the bin is often an operator—probably not a person high up the food chain of employment structure. My advice is that your very best person should be reviewing scrap bin performance regularly.

If we consider a single innerlayer, the reason for declaring a part scrap may be obvious—perhaps a broken track so this is relatively easy to put a name to—but I would be much more interested in the underlying reason for the broken track. This is a much harder distinction to make and some serious effort may be required to understand why the track is broken. These could be:

• Physical damage—this may be quite easy to detect; there could be abrasions around the track break in similar directions which give you a strong hint that the fault occurred due to the panel being dragged over a sharp object. You don’t need much force to damage the delicate dry film before etching enough to create a break in the copper track or a short circuit on a pattern-plated board. If abrasions line up with the direction of travel through a conveyorised process you may need to look closely at your conveyor to work out where the damage has occurred.    If there is a rounded shape to the break it is quite likely that there was a dry film adhesion problem prior to etching but the underlying reason could have been lamination roller damage, poor pre-cleaning, or base material damage prior to lamination.
• Dirt on the artwork is another reason for track breaks during the innerlayer process. Dirt can stick and be present for a few panels or it could be a one-off problem on a single print.

 My point here is that the least useful information is the fact that you have an open circuit. To make any useful improvement, you have to find a way to get down to what actually went wrong. You may have to look at a lot of panels to start to see the patterns which can help you make the correct analysis. There is no substitute for spending quality time on working out where your process is weak.

The payback is potentially much more than just saving the material and the time to manufacture it. The occasional spot of dry film lift may just nick your tracks when you are working on 0.25 mm line and space. It may break occasional tracks when you reduce the line and space to 0.1 mm but it could give you a super headache if you want to go finer.

This is truly process engineering, gaining a significant effect from making small changes. Printed circuit design is constantly evolving and manufacturing needs to keep up. In manufacturing we don’t usually have the option to constantly update our hardware but we can consistently work on our process control making small controllable changes to ensure customer requirements can be met and profitability is maximised.

The example I have given may be simple but the logic used to work out where things are going wrong is the most important part of the investigation cycle. When you are chasing innerlayer faults on finished multilayer circuits you may quite literally need to dig deeper to get to the useful information. But the underlying technique is the same: gather as much evidence as you can to allow you to make your best appraisal of what has gone wrong. Then make your improvements one at a time to allow you to monitor the individual and combined effects of the changes you have made. Make sure that the process controls and quality metrics that you have in place can help you hold onto the gains you have made.

I remember one of the first investigations I made, as a newly appointed manufacturing engineer, into a high failure rate for a product that we were regularly manufacturing. The PCB used to run in batches of 60 panels and when I looked back through previous records for the product there was often quite a high fallout rate at electrical test. The company I was working for had quite a good record-keeping system and there was enough information available to tell me that innerlayer short circuits were a re-occurring problem for this particular product.

I had a batch of boards available to me at the bare board test stage with quite a significant fallout for shorts. It was easy enough to confirm that the faults were somewhere on the innerlayers and using a tone ohm [LL1] which can help to isolate the position of short circuits on a PCB by making an audible noise based on electrical current flow between the shorted networks. I identified the position of some of the faults to small areas of the panel which I could then cut out and grind down layer by layer to work out exactly the reason for the failure.

It was obvious after grinding down to the faults that the issue in this case was layer-to-layer mis-registration. Three of the innerlayer cores were typically in good alignment with each other but the other two often varied for position in random directions. This random misregistration coincided with the thickness of the cores; the first three cores were 0.8 mm thick but the remaining cores were 0.3 mm and 0.2 mm. This was not an ideal build for several reasons; the side-to-side symmetry was poor with the thin layers on one side and the thick ones on the other. In addition to this the glass used to construct the thick cores was 7628 while the thin layers were 2116 and 1080. There was also a mixture of these styles of glass used for the pre-pregs to achieve the desired separations between layers. A quick call to our design office confirmed that there was no way that the build could be changed at this stage.

Next, I looked at the artwork alignment. At the time we were using a pin lam system with tooled artworks. When I laid the artworks up on the alignment pins they were not perfect. I made another set and was super careful when tooling them to make sure they were as good as they could be. This certainly gained me a little improvement but, while it may have gained me 0.01−0.02 mm it was not the amount needed to ensure that innerlayer alignment was good!

The product was a regular runner and this really helped to make this a pet project. We were already approved to use several different base material manufacturers, so I lined up three different materials for my trial. Instead of buying the material pre-cut I bought full sheets and cut the material into panels myself. This allowed me to match the panel positions through the stack. There were five cores in the stack-up, and for my trial I matched the innerlayers so they had all been cut from the same position in the full sheet and had the same orientation (I used a punch mark in the corner to make sure each part was processed the same way around at every stage).

The improvement was remarkable. I had added some fiducials to the panel border to enable me to make some checks on alignment without destroying live product. What was interesting was that not all materials were the same. The same types of material from two different manufacturers had very different characteristics and the material movement after the press cycle was double when you compared the worst to the best.

More useful was that I had gained a massive improvement in through the panel alignment due to picking my stack from matched cores. (Matched as in all cut from the bottom left of the full sheet or all from the middle of the full sheet.) This experiment gained me a huge amount of ammunition for dealing with difficult products.

So back to the point I made at the beginning. To be able to make a thorough and meaningful investigation of the problems built into your manufacturing cycle it is essential for the investigator to be able to roam throughout the whole production process without feeling that anyone’s toes are being trodden on. Just as importantly, there needs to be enough time available to enable reasonable trials and experiments can be undertaken and assessed.

My tip for the month: If you want a simple way to get the best possible layer-to-layer alignment when you are pushing the limits of capability, cut your working panel from the centre of the full sheet and save the rest for your less difficult products