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All Set to Measure Differential Insertion Loss?

Back in the July edition of The Pulse I mentioned that in the coming months I’d be looking in more detail at how the PCB industry would need to adapt to increasing requirements for insertion loss testing. This month’s Pulse is not primarily about the technical side of loss measurements as that has been extensively covered elsewhere in a variety of technical seminars and papers. This column discusses the gradual adaptation necessary for PCB fabricators as more and more silicon families drive the industry toward the requirement for in house measurement of insertion loss.

There are two primary measurements required, dB insertion loss for single ended traces, often referred to as S₂₁, and dB insertion loss for differential traces, S_DD21. S₂₁ and S_DD21 are S-parameters – in layman’s language the S-parameter describes the level of signal received at the output of a transmission line (Port 2) when a signal is injected at the input (Port 1). For some reason best known to microwave engineers the nomenclature refers backwards, i.e., for single-ended, S₂₁ – what comes out of Port 2 when I put something into Port 1. For differential signals, the insertion loss is termed S_DD21, again, what signal is transmitted through to Port 2 – the output of a differential pair – when I inject a signal into Port 1. S-parameters S₂₁ and S_DD21 are measured in dB (and phase) over the range of desired frequencies called out for by the design authority.

In an ideal world the characterisation of transmission line loss would be derived from measurements made on a VNA – Vector Network Analyser; the VNA scans in small steps through the range of desired frequencies, injecting the signal into the transmission line and measuring the amplitude and phase at both input and output – and generating the S-parameters as a result. VNAs however can be time consuming to set up and usually require skilled operators to generate the required measurements, and whilst single-ended measurements are relatively straightforward to make, deriving differential S-parameters with a VNA is a significantly more time consuming task.

The holy grail, then, is an alternative measurement technique which still gives acceptable measurement accuracy and repeatability but lends itself more easily to the PCB production environment.

Using a TDR – Time Domain Reflectometer – to generate loss measurement has generated a variety of possible methodologies, all with varying strengths and weaknesses. The principle is simple, apply the TDR to the trace under test and mathematically post process the waveform to extract the harmonic content and calculate the losses. Whilst it is easy to say this, challenges exist, such as the fact that though a TDR waveform is rich in frequency content, the signal power drops significantly at the higher frequencies. To ensure adequate performance at the high frequencies requires not only the right equipment, but also careful choice of interconnect cables probes and ultimately the correct design of the coupon launch structure. Ideally the test system will monitor the complete system and inform the user of the maximum available bandwidth.

Over the past few years several methodologies for using TDR to measure loss have been tabled at IPC high frequency standards meetings. Root Impulse Energy (RIE) initially showed promise but fell down owing to a lack of standardisation. Short Pulse Propagation (SPP) has gained some adoption; SPP is capable of extracting very good data but veers towards the more complex to set up. SET2DIL proposed at Designcon 2010 shows promise as relatively straightforward to adopt and has the benefit of measuring differential insertion loss with a single ended TDR – hence SET2DIL (Single Ended TDR to Differential Insertion Loss.)

Every method has its for and against, but the industry will benefit from converging to as few methods as possible, leading to lower cost of adoption and easier correlation.

The challenge is to meet the often conflicting demands of production repeatability, minimum real estate for test coupons, maximum bandwidth, ease of use and adoption and, where possible, ESD protection if achievable at the desired bandwidth of testing. On the ESD front, there is a possibility that if the OEMs demand ever higher test bandwidth, instrumentation based ESD protection, as practiced with many current generation products, may no longer be a viable route. This will present volume fabricators, especially, with a challenge as even with existing systems the occasional ESD inflicted damage to measurement systems is inevitable. Increased bandwidth may mean that test system suppliers may need to remove inbuilt or add-on protection units to raise system bandwidth to desired levels. For fabricators this will mean considerable effort to further prevent ESD in the work area, including controlling materials in the test environment, further worker training and monitoring of ESD levels present on the operator / probes and samples under test.

SET2DIL methodology and use in a test environment feels refreshingly similar to impedance test. However, just as increased care needs to be taken with ESD, the demands on probes, interconnect cabling, and coupon design, especially the coupon launch structure, are more critical than for impedance testing, though, with the correct tools and growing experience, are comfortably within the fabricator’s capabilities.

More than ever, a key part of the equation is for the supply chain to be in contact so that design requirements and coupon requirements or change requests are approved by all parties before implementation.

Having said the above, the industry and the supply base is innovative and ways around these challenges will appear as the drive for loss measurement grows.

For further reading you may enjoy...

Paul Carre, (2010) "FR4 loss measurement for high volume manufacture (HVM): where next?", Circuit World, Vol. 36 Iss: 3, pp. 28 – 34

Loyer / Kunze: SET2DIL: Method to Derive Differential Insertion Loss from Single-Ended TDR/TDT Measurements Designcon 2010