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Zulki’s PCB Nuggets: Avoid PCB Wire-bond Loop Failures

Today, hybrid PCB manufacturing is making greater inroads into our industry, which is the marriage of traditional SMT manufacturing together with microelectronics and wire bonding. In many cases, the OEM working with EMS providers doesn’t fully understand the nuances of effective wire bonding and related failures.

What has to be considered with new hybrid manufacturing is that wire bonding involves a number of key technical steps. Those steps must be performed efficiently so that wire bonding is highly reliable. However, without experienced microelectronics/wire-bonding technicians, the assemblies may incur problems and subsequent product flaws or latent field failures.

Here’s a basic tutorial. The first thing to know is that we’re dealing with very fine, delicate wires in the range of two-, one-, and in some cases, sub-mil thicknesses. Wire bonding creates a loop or a wire arc between the bare chip and the substrate or PCB surface connection. This is where a series of failure modes in the wire bonding process can occur.

As shown in Figure 1, wire-bond loops demand precise pull testing conducted by trained PCB personnel. Plus, you have to have a wire-bond pull tester for reliable joints. This equipment and know-how are important to immediately target problematic areas during the assembly and manufacture of processes, such as die-attach and chip-on-board (CoB) applications and wire bonding.

There are eight modes of failure for wire-bond loops. Savvy EMS providers who assemble and manufacture PCBs are well supplied with highly reliable wire-bond testing for these loops to ensure that a PCB doesn’t incur any of these failure modes.

Wire-bond loops can break from different segments of the wire length. One of the weakest points of a wire bond is at the tip of the loop where it has been formed. That is part of the reason it’s the weakest point. This is known as the neck-down breakpoint and is the most common.

Another is a mid-span break somewhere in the vicinity of the middle part of the wire. Two other failures are known as a failure in bond. One occurs at the interface between the wire and metallization at the bare die. The other is at the interface between the wire and metallization at the substrate, package post, or other than the bare die or chip. Two other failures are due to lifted metallization from the die and the substrate or package post. The last two failures can be due to a die or substrate fracture.

There are a number of reasons these failures can occur in PCB assembly and manufacturing. A major one is if the PCB’s surface or the substrate isn’t sufficiently clean. Plasma etch cleaning using argon gas must be used so that all of the residues of any oxidation are completely removed and the surface is 100% clean. This way bonding is reliable and sturdy.

There can also be other reasons for wire-bond loop failure. The quality of the wire may be bad or contaminated. Programming the wire-bond pull tester may not be properly done so that it’s not optimizing the loops. As a result, loops are created that aren’t sufficiently sturdy for maintaining the bond under a certain test force. 

Zulki Khan is the president and founder of NexLogic Technologies Inc.