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SMART Group UK Seminar: Focus on Design, Manufacture, and Test of High-reliability Electronics

The UK aerospace and defence industry has global significance and relies heavily upon the design and manufacture of high-reliability electronics. And high reliability is also a key factor in the automotive and medical electronics industries.

Orchestrated by Technical Committee members Ian Fox and Bob Willis, and hosted by Aero Engine Controls in Birmingham, England, this SMART Group Seminar on design, manufacture, and test of high-reliability electronics proved to be a truly international event, attracting a sell-out crowd with delegates from Denmark, The Netherlands, Italy, Ireland, Scotland, Wales, and England.

Ian Fox reflected upon the 70-year history of Aero Engine Controls, now part of Rolls Royce, in designing, making, and supporting control systems for gas turbine engines, in the introduction to his presentation on expansion control in printed circuits.

Why were controlled-expansion PCB’s necessary? Fox began by listing typical expansion coefficients of materials and component packages: 16ppm/°C for FR4 multilayer PCBs, 6.5ppm/°C for leadless ceramic chip carriers and chip resistors, 10-14ppm/°C for chip capacitors and 10-12ppm/°C for plastic SOIC packages depending on the volume fraction of silicon within the package. The expansion mismatch due to variations in expansion coefficients generated strain on solder joints during thermal cycling, and repetitive application of strain led to fatigue and eventual failure of joints. In high-reliability assemblies, expansion control was necessary to reduce the cyclic strain to acceptable levels.

Aero Engine Controls had many years’ experience of designing and building controlled-expansion PCB assemblies, and copper-invar-copper incorporated into an all-polyimide multilayer build had historically been their preferred material, giving finished PCBs with expansion coefficients of 6 to 7ppm/°C or 10 to 11ppm/°C, depending on the intended component mix. There were certain issues to be considered, including exposed copper-invar at the edges of PCBs, the need to ensure the complete filling of clearance holes with ceramic-loaded resin and to carefully control drilling parameters to avoid cracking in plated-through holes. However, provided they were manufactured by competent fabricators, copper-invar-copper PCB constructions had proved extremely reliable over 20 years’ service history, particularly in assemblies with large leadless devices.

For certain applications, aluminium/silicon carbide metal-matrix composites had been used as central core between two thin PCBs, giving an expansion coefficient of 7.2ppm/°C.

Under evaluation at Aero Engine Contols was a proprietary copper-clad carbon fibre composite material known as StablCor, which offered some interesting properties. Initial testing has shown that incorporating this material into a multilayer PCB gave an extremely robust structure, although it did little to reduce the coefficient of expansion of FR4 constructions.

Looking to the future, Fox answered the question “Will we still need expansion control?” with reference to trends towards reduction in active component size such that the package effectively contained a higher proportion of silicon, and the increasing use of large multi-chip modules based on high-temperature co-fired ceramic packages. He believed that expansion control would continue to be a requirement and left the audience to speculate upon ways in which this might be achieved.

The second presentation was by Tim Gee, technical director of Stevenage Circuits, with an overview of Semblant’s SPF nano-material, which he believed brought a totally new perspective to the solderable finishing and long-term protection and preservation of PCBs. SPF was a low-cost plasma polymer process which yielded a patented solder-through finish on metal surfaces. The material was RoHS and REACH compliant and the dry, room-temperature process involved no hazardous waste or conflict metals, required no water and consumed minimal energy. The finish was an unreactive, highly cross-linked fluoropolymer which coated the entire surface area and gave unprecedented environmental protection and corrosion resistance. Gee explained the principles of the plasma deposition process and the use of Fourier-Transform infra-red spectroscopy to measure the deposit thickness, typically 40 nanometres.

Gee showed many examples of independent test results which demonstrated how SPF dramatically improved the corrosion resistance of copper, immersion silver and ENIG surfaces under a wide range of conditions, whilst maintaining excellent solderability through multiple reflow cycles.

A particularly desirable attribute of SPF was its performance in RF applications. Final finishes applied over transmission lines could have profound effects on insertion loss, and could significantly downgrade the overall performance of high frequency designs. There were particular issues with ENIG and ENEPIG plated finishes due to skin effect in the nickel. In instances where high density RF designs required a finish which could not only minimise signal loss, but also withstand multiple soldering operations, immersion silver was popular, but tended to corrode if unprotected. Immersion silver coated with SPF offered an ideal solution.

Martin Wickham from the National Physical Laboratory (NPL) discussed a new approach for studying CAF, conductive anodic filamentation, an increasingly significant failure mechanism in printed circuit assemblies. He explained CAF as an electrochemical process, initiated by corrosion of copper at an anodic site within the PCB and resulting in corrosion products growing along interfaces between laminating resin and glass-reinforcement filaments towards a corresponding cathodic site. CAF formation required electrical charge carriers to be present to form an electrochemical cell, typically ionic species inside the PCB: hydrogen ions and hydroxyl ions from water, which must also be present to dissolve the ionic species and sustain them in their mobile ionic state, an acid environment around conductors to initiate copper corrosion, delamination between glass fibre and resin to form a pathway, and an electrical bias to act as a driving force for ion transport.

With the support of a group of industrial partners, NPL had devised a technique for observing CAF effects under controlled conditions and studying the individual effects of a range of variables including different resin chemistries, glass fibre sizes, surface conditions, and finishes, and the effects of drilling, desmear, and reflow. Their Simulated Test Vehicle enabled CAF to be monitored in real time with an optical microscope and backlighting. It consisted of an copper lead-frame etched on a polyimide flexible substrate, across which glass fibre filaments were placed and embedded in a solution of laminating resin which was subsequently dried and cured, as it would be in a laminate manufacturing process. The test vehicle enabled ionic material, in the form of copper plating electrolyte, to be brought into contact with the glass filaments, and an anode-cathode bias voltage to be applied.

The technique had been successfully used to evaluate the effects of different resin systems, different glass fibres, desmear process, reflow process, and glass fibre bundle size on CAF failure. It had been observed that heat-cleaned and loom-state fibres formed CAF more easily than finished fibres, with loom-state fibre having the highest propensity. Phenolic cured resin appeared to promote more CAF than DICY-cured resin; the desmear process did not increase CAF formation to any great extent, although the reflow process caused significant increase. And large glass bundle size increased CAF formation, but not significantly. The project was ongoing and the next phase would study actual PCB build parameters.

Not surprisingly, actual PCB build parameters were fundamental to the following presentation, from Anthony Jackson, product assurance manager at Invotec, specialist manufacturers of complex PCBs for military and aerospace applications. His topic was the improvement of the reliability of a 16-layer three-stage bonded flex-rigid board using a “design-test-analyse-react” approach. He explained that, because of the variety of materials used in the construction of flex-rigid designs, they were more susceptible to thermal expansion stresses and less robust than rigid PCBs. The product in question was required to perform with high reliability in a harsh environment and the customer had specified that it withstand a minimum of 400 cycles of interconnection stress testing (IST) before failure.

The interconnection stress test is an accelerated test method that measures the integrity of the printed circuit interconnect structure by thermally cycling a representative test coupon electrically whilst monitoring changes in resistance, revealing specific areas of weakness in a particular construction. Although Jackson’s example was required to pass 400 cycles of IST, the initial samples failed at between 258 and 289 cycles. The point of failure, identified by thermal imaging and microsectioning was cracking of the copper plating at the centre of a plated-through hole, corresponding with an area of no-flow prepreg. Improvement in drilling parameters, a reduced plasma desmear cycle and increased plating thickness increased the cycles-to-failure to between 387 and 446, but it was clear that with the construction as designed, the product would remain close to the limit of acceptable reliability. So the next step in the “design-test-analyse-react” procedure was an engineering review with the customer, which resulted in a modification of the build such that four single-sided flex layers were replaced by two double-sided layers. This reduced the amount of no-flow prepreg in the build and enabled a further reduction in the severity of the plasma desmear cycle, and resulted in a dramatic increase in IST cycles-to-failure to more than 1,000.

Jackson remarked that all of the failures seen during the different iterations were linked to protrusions and notches within the hole wall acting as stress risers. His observation led to a lively discussion around the merits of the old MIL-SPEC requirements for heavy etch-back to give three-point contact between inner layer copper and through-hole plating. The consensus was that heavy etch-back probably did more harm than good in terms of the reliability of PCBs under thermal cycling conditions.

The afternoon session began with Professor Andy West reviewing electronics research at Loughborough University. With great gusto, he listed an impressive range of projects including Electronics Manufacturing Process Enhancement Towards High Yields (EMPATHY), Embedded Enhanced RFID (RFIX) for Printed Circuit Board Manufacture, and Added Value, Design and Simulation of Complex Low Volume Electronics Production (DISCOVER), Complex Low Volume Electronics Simulation (CLOVES), Life Cycle Tracking (INBOARD), and Design for Increased Yield in the Electronics Manufacturing Supply Chain 2012-2014 (DIY).

Of the many examples he described, two had particular relevance to the high-reliability theme of the seminar. One was the modelling of vibration modes in printed circuit assemblies to facilitate the optimisation of component placement, and the second was an analysis of the multitude of factors which determine the consistency and precision of solder paste placement in the stencil printing process. He showed how information was identified, gathered and incorporated into a DoE, how experimental models were developed, utilised and studied, how observations were analysed and how rules were designed which could then be applied to physical models, with an end objective of getting intelligence into shop-floor operations.

From university research to the practical aspects of achieving high-reliability electrical interconnection without recourse to soldering, as Andy Longford from PandA Europe discussed latest developments in press-fit connections. Press-fit technology exhibited a number of advantages over soldering methods. It involved no thermal stress on the PCB, no fumes, gases or cleaning fluids, no cold solder joints, no solder shorts and, in the case of press-fit connectors, the elimination of the need for mounting screws. Two classes of press-fit were available: “Solid pin” which did not deform in the insertion process, and “compliant pin” which compressed as a result of insertion into a PCB through hole. “Eye of the needle” compliant pin connectors had been developed to meet automotive requirements as defined by IEC, EIA and SAE, and were already qualified foroperational temperatures of 125°C and 150°C and moving toward 175°C. Of the material options available, copper-tin alloys were the most popular for general-purpose applications, whereas copper-chromium-silver alloys gave best conductivity for power applications, and compliant pins were compatible with various PCB plating types. Additionally, press-fit technology offered complete repairability and ease of dis-assembly, enabling “green” system development

Longford discussed typical automotive performance and test requirements for press-fit technology: Mechanical properties including insertion, withdrawal and retention force, vibration in temperature, thermal shock, electrical contact resistance, and through-hole integrity after various environmental and corrosive-atmosphere conditions.

Back to soldering! Henkel’s technical specialist Richard Boyle reported the latest lead-free developments in a review of low-silver SAC alloys. Were they useful for high reliability? “In a word, no, but they do have some interesting properties. In particular, they give much better resistance to mechanical shock,”he said. Why use silver at all? “Metallurgically, it inhibits the dissolution of silver from the printed circuit and the components.”

Although the cost of solder represented a relatively small proportion of the overall value of a PCB assembly, cost reduction was the main driver for reducing silver content to less that 1% compared with the 3 to 4% silver in near-eutectic SAC alloys, where silver could represent more than 50% of the material cost, and was subject to dramatic metal-market price fluctuations. The improvement in shock resistance in low-silver alloys resulted from their lower modulus such that their greater elastic compliance reduced the stress transmitted to interfaces upon mechanical shock.

Reducing silver content resulted in an increase of up to 10°C in melting point. Wetting speed was slightly slower, although this was unlikely to cause any significant difference in the reflow process. And because low-silver alloys were non-eutectic, joints had a duller appearance. Other issues were reduced reliability due to poorer low-cycle fatigue performance compared with near-eutectic SAC alloys, and lower mechanical strength.

But all was not lost--there was a lead-free alloy specifically designed for high reliability! An innovative formulation developed by a consortium of research institutions and solder manufacturers for high-temperature under-the-hood automotive applications was a 6-component alloy known as InnoLot, based on SAC 387 with the addition of bismuth, antimony, and nickel as grain refiners. InnoLot alloy had a high-tensile strength, yield stress, and shear strength at both low and high operating temperatures, and performed remarkably well on thermal cycling and drop testing. Its reliability under vibration testing compared well with traditional tin-lead solders and was superior to other lead-free alloys.

The final presentation of a long and technically-intensive day came from Jon Anderson of Humiseal, with an interesting discussion on PCB design considerations for conformal coating. In his definition, a conformal coating was a thin plastic protective film which conformed to the varied profile of an electronic circuit assembly, acting as a membrane to protect the assembly from water vapour, solid debris and corrosion in harsh environments. Typical solvent based coatings gave coating thicknesses between 25 and 75 microns; 100% solids formulations gave thicknesses of 75 to 200 microns. IPC‐HDBK‐830, Guidelines for Design, Selection, and Application of Conformal Coatings was the main industry standard, together with IPC 2221B and IPC‐A‐610A for generic design and acceptability. But these standards were not particularly definitive, and tended to throw most of the responsibility on to the designer.

Along with the change to lead-free soldering had come higher reflow temperatures, low VOC fluxes with higher solids content, new solder paste chemistries, new solder mask chemistries, new solderable finishes on PCBs, and PCBs now increasingly came from distant, rather than local, manufacturing locations. Current technology trends were toward ultra-fine component pitch, higher frequencies, and higher operating temperatures. From the perspective of conformal coating, reduction in overall dimensions, and tighter limits on keep-out zones demanded greater selectivity to achieve coverage, and VOC-free materials often required specialist dispensing techniques.

It was important for the PCB designer to consider at the outset the application method, the surface area of PCB to be coated, the types of components to be coated, the keep-out areas to be defined, and the inspection level required. Anderson gave valuable practical advice on design for selective coating, with particular reference to shadowing effects of tall components and constraints on keep-out zones.

The attentiveness of the audience was impressive. The well-chosen seminar programme delivered an enormous amount of relevant information on many issues associated with the design and manufacture of high-reliability electronics and provoked plenty of interactive debate and discussion. Another excellent SMART Group event and a great credit to those who organised and hosted it.