March 20, 2025
Over the past two decades, I've simulated numerous complex, high-speed designs for customers creating computer-based products. In addition, I've conducted signal integrity software training courses and led classes on high-speed design. In this month’s column, I will reflect on the key considerations for achieving a successful high-speed PCB design that performs reliably, and I’ll highlight some of the common signal integrity issues that I frequently encounter.
January 22, 2025
Predicting the role of PCB designers in 10 years is a challenge. If only I had a crystal ball. However, we know that as technology progresses, the limitations of copper PCBs are increasingly apparent, particularly regarding speed, bandwidth, and signal integrity. Innovations such as optical interconnects and photonic integrated circuits are setting the stage for the next generation of PCBs, delivering higher performance and efficiency. The future of PCB design will probably incorporate these new technologies to address the challenges of traditional copper-based designs.
December 26, 2024
Artificial intelligence (AI) is transforming how we conceptualize and design everything from satellites to PCBs. Traditionally, stackup planning is a manual process that can be multifaceted and relies heavily on the designer's expertise. Despite having best practices and various field solvers to optimize parameters, stackup planning remains challenging for complex designs with advanced packaging, several layers, multiple power pours, and controlled impedance requirements.
November 21, 2024
The idiom “rule of thumb” is often used in electronics design and has its origins in the practice of measuring roughly with one’s thumb. Rules of thumb are easy-to-remember, broadly accurate guides or principles based on practice rather than theory. They are used to help feed our intuition to find a quick solution based on experience. We are often forced to use rules of thumb in PCB design in the absence of expensive analysis tools. We also use them to get quick ballpark figures initially and then fine-tune the numbers with further analysis. We can use rules of thumb as a sanity check to assess whether we are using our tools correctly. In this month’s column, I will present some commonly used and helpful rules for high-speed PCB design.
September 11, 2024
Technologies such as artificial intelligence, autonomous cars, smartphones, and wearable devices are significantly transforming the semiconductor industry. The miniaturization trend drives the IC footprint to an even smaller profile, requiring tighter margins. From the PCB designer’s perspective, smaller form factors are achievable, making devices more compact and lightweight. But double-sided SMT placement, reduced routing channels, and high-speed constraints create multiple challenges for designers. However, there are some advantages to miniaturization: shorter interconnects between the IC and the PCB reduce signal loss and electromagnetic interference. High-speed digital signals in the GHz range benefit from reduced parasitics.
July 25, 2024
In circuit theory, we learn that current flows in a closed loop, returning to the source via a conductor pair. This flow of current provides power to the load, and energy transfer occurs as described by Ohm’s law (P = VI). Conversely, in electromagnetics theory, we discover that current does not provide the power in a circuit, but rather the energy wave is guided by the conductor to power the load, according to Maxwell’s equations.
June 24, 2024
The characteristic impedance of a transmission refers to the impedance seen by a driver looking down an infinitely long trace. Interestingly, the characteristic impedance is independent of trace length. It’s a measure of the ratio of inductance to capacitance at any point along the trace. Therefore, while trace length matters for signal propagation delay, it doesn’t directly impact characteristic impedance. When a transmission line is perfectly matched to the driver and load, the signals propagating electromagnetic (EM) energy are totally absorbed by the load. This is the perfect scenario that all electronics designers strive for. However, this is rarely the case, and reflections do occur whenever the impedance of the transmission line changes along its length.
May 23, 2024
Materials used for the fabrication of multilayer PCBs absorb high frequencies and reduce edge rates. That loss in the transmission line is a major cause of signal degradation. However, not all of us are designing cutting-edge boards and sometimes we tend to over-specify requirements that can lead to inflated production costs. In this month’s column, I will look at the types of materials commonly used for PCB design and how to select an adequate material to minimize costs.
March 21, 2024
In the early days of my career, I was a typical backroom geek more comfortable with technology than engaging in conversation. My obsession lay in my work, fueled by the exhilaration of mastering new technologies. The notion of standing before a class of 50 or more individuals to deliver a solo weeklong course seemed utterly terrifying. But necessity gives birth to innovation. When confronted with challenges, we have two choices: step up or fade into oblivion.
February 22, 2024
Embedding components into the multilayer PCB substrate can have many benefits, including reduced board size and improved signal integrity. However, embedded capacitance material (which is not really a component but rather part of the substrate) can improve power integrity dramatically by reducing AC impedance and generally enhancing the performance of the product. It takes up no additional space, is easy to implement (because it is compatible with standard FR-4 processes), and can be cost-effective.
December 14, 2023
High-speed PCB design is not as simple as sending a signal from the driver to the receiver over a transmission line. One should also consider the presence and interaction of the power distribution network (PDN) and how and where the return current flows. A logic schematic diagram masks detail crucial to the operation of unintentional signal pathways vital to the understanding of signal performance, crosstalk, and electromagnetic emissions. The PCB designer needs to be able to visualize the connectivity of the return current flow to avoid large loop areas that increase series inductance, degrade signal integrity, and increase crosstalk and electromagnetic radiation.
November 21, 2023
Electromagnetic energy propagates at about half the speed of light within the dielectric of a multilayer PCB. This speed is inversely proportional to the square root of the dielectric constant (Dk) of the material. The lower the Dk, the faster the propagation of the wave. In the past, we ignored the board-level delay as it was relatively instantaneous compared to the slow rise time of the signal waveform. But now that we have entered the realm of Gigabit/s design, an unaccounted 10 ps of delay can mean the difference between success and absolute failure of a high-speed design. Also, the trend is toward lower core voltages, which conserves power. However, reducing the core voltage also reduces the noise margin and impacts the system timing budget.
October 17, 2023
PCB design is all about knowing your EDA software tool backward. There is no point in designing a complex board if it doesn’t perform to expectations or isn’t manufacturable. The goal is to create a board that is functional, reliable, and cost-effective. Design rules are important because they help optimize the design of a product for its manufacturing and assembly praocess. This is called design for manufacturing (DFM). It aims to minimize the risk of errors and delays when a product is transitioning from prototyping to mass manufacturing. It also optimizes design and cost and is vital to meet time to market. Employing DFM strategies reduces the cost and difficulty of producing a product while maintaining its quality.
August 24, 2023
Today’s PCB design tools are a far cry from the rudimentary tools we used 30 years ago, but even though the algorithms are now quite clever, they are still fairly basic as far as intelligence goes. Comprehensive design rules can be established to accommodate myriad constraints to limit placement and routing which advise us when we have overstepped the boundaries. But what if artificial intelligence (AI) was introduced into the mix? How could it enhance the PCB design environment? What would happen if we applied AI/machine learning techniques as part of the design flow?
July 20, 2023
Plane cavities in multilayer PCBs are essentially unterminated radial transmission lines. They form a transmission line that propagates electromagnetic (EM) energy within a plane cavity emanating from a feed point, within the plane, and outward in all directions. Like all transmission lines, it will reflect if not terminated. This creates standing waves—ringing. The bigger the mismatch, the bigger the standing waves, and the more the impedance will be location-dependent. As frequency and edge rates continue to increase, the impact of intrinsic electrical characteristics becomes more pronounced. AC switching currents in the power/ground planes can be very large. Under these circumstances, a plane pair acts more like a radial transmission line rather than a distributed planar capacitor.
June 21, 2023
The field of PCB design is evolving rapidly, which creates both opportunities and demands for new and experienced designers. PCB designers must deal with various issues in finding the right balance between the form factor, functionality, and power requirements of their boards while ensuring that the stackup, placement, and routing are completed to guarantee stringent signal and power quality. Advanced tools and skills are needed to create compact, flexible, high-performance and low-power PCBs with faster turnaround times.
May 11, 2023
In the past, selecting a dielectric material for PCB fabrication was a no-brainer because we all just used FR-4. Clock frequencies were low and signal rise times were slow, so substrate performance was not an issue. However, in today's multi-gigabit designs, with their extremely fast rise times and tight timing margins, precise material selection is crucial to the performance of the product. This puts the materials selection process under tighter scrutiny. Materials used for the fabrication of multilayer PCBs absorb high frequencies and reduce edge rates, which is a major cause of signal integrity issues. But not all of us are designing cutting-edge boards. Sometimes we tend to overspecify requirements, which can lead to inflated production costs.
April 20, 2023
The path of electromagnetic energy in multilayer PCBs is generally guided by a signal trace bounded by the plane(s). However, as the demand for high-density, high-performance microwave (µWave), and millimeter wave (mmWave) circuits increases in the latest wireless technologies, the electromagnetic fields require more stringent control as they tend to radiate more—particularly on microstrip (surface) layers. Thus, as we enter the realm of µWave (3-30 GHz) and mmWave (30-300 GHz) designers are compelled to implement waveguide techniques, used traditionally in RF design, to reduce radiation loss.
March 30, 2023
When two (or more) electromagnetic fields overlap or meet, they add vectorially at each point in space. Fields have direction and polarity. At any point in space, there can be only one field, so at some spacial points, they will cancel each other, and at others, they will re-enforce each other. James Clerk Maxwell described electromagnetic fields as being linear. Linearity implies superposition, meaning that the fields do not merge with each other but rather add vectorially—distorting the signal. This applies to both static (DC) and time-varying (AC) fields.
February 23, 2023
The propagation of electromagnetic energy can be controlled in a number of ways depending on the medium the energy is traveling in. However, electromagnetic waves do not require a medium to propagate. This means that electromagnetic waves can travel not only through liquids, solids, and air, but also through the vacuum of space. What’s more, they do not require electron current flow for the transfer of energy.
February 02, 2023
An eye diagram is a useful tool for the analysis of signals used in digital transmission. It provides a quick scan of system performance and can offer insight into the nature of channel imperfections. An eye diagram is simply a graphical display of a serial data signal with respect to time that shows a pattern that resembles an eye. Careful scrutiny of this visual display can give one a first-order approximation of signal-to-noise, clock timing jitter, reflections and skew. In this month’s column, I will take an eyeball look at the eye diagram.
December 01, 2022
Ralph Morrison was a physicist who promoted the belief that electromagnetic energy flows in spaces, not the traces. That energy does not flow in the copper traces of a PCB, but rather the energy follows the traces acting as a waveguide and propagates through the dielectric material. This explains many electromagnetic (EM) effects such as radiation from outer microstrip layers and from stripline fringing fields, how components can be magnetically coupled, and why crosstalk is created by overlapping EM fields. But it also raises a few questions.
October 19, 2022
Electromagnetic (EM) energy propagates through the dielectric materials of a multilayer PCB guided by the signal traces between the planes, for inner stripline layers, but it acts slightly differently on the outer microstrip layers. Microstrip layers generally have a solid ground reference plane on one side but allow radiation from the boundless surface into the air. A well-thought-out routing strategy can avoid up to 10 dB of radiation from the substrate. Embedding signals between the planes reduces these emissions, and susceptibility to radiation, as well as providing electrostatic discharge protection. So, not only can one prevent noise from being radiated but also reduce the possibility of being affected by an external source.
September 22, 2022
In a previous column, I deliberated on why the 2D field solver is an essential tool for all high-speed PCB designers. But like all tools, one needs to know how best to apply its unique features to enhance your design process. Obviously, calculating transmission line impedance, in its various forms, is the prime function but field solvers can also provide additional information to ensure good design practice way before the layout begins.
August 23, 2022
There are numerous ways to improve the PCB design and production processes and thereby reduce costs, from fundamental improvements involving a standard form factor and reducing the board size and complexity to technology choices and simulation to reduce iterations. A good starting point would be the IPC standards which were developed by the electronics industry to enhance manufacturability, testability, and assembly. Anyone new to PCB development should initially begin with these standards and then fine-tune them to capture the essence of their design style.
July 25, 2022
A field solver is the engine behind signal and power integrity analysis. You never see it but it performs all the magic of simulation. In its elementary form, the field solver can employ Maxwell’s equations to calculate the parasitic elements of a solution space. This method is referred to as 2D extraction and is used to analyze and synthesize a stackup to achieve a target single-ended or differential impedance. The velocity of propagation can also be extracted to perform signal integrity analysis. A field solver can be used as a stand-alone tool or as part of a simulation environment. In this month’s column, I will take a look at 2D field solvers.
June 14, 2022
The most common question I get asked by PCB designers is, "Do you need copper ground pours on digital multilayer PCBs?" The short answer is, "It depends." Unfortunately, the myth of copper pours is fueled by reference designs that seem to persistently use this old RF design technique. Copper pours are sometimes used incorrectly simply to fill in the unused space on a board. However, in some cases ground pours may be an advantage. In this month’s column, I will look at where and where not to use ground pours.
May 31, 2022
When a transmission line is perfectly matched to the driver and load, the signals propagating electromagnetic (EM) energy are totally absorbed by the load. This is the perfect scenario that all electronics designers strive for. However, this is rarely the case and reflections do occur whenever the impedance of the transmission line changes along its length. This can be caused by unmatched drivers/loads, layer transitions, different dielectric materials, stubs, vias, connectors and IC packages. By understanding the causes of these reflections and eliminating the source of the mismatch, a design can be engineered to perform reliably.
April 21, 2022
PCB designers are continually challenged with demands for reduced product size. However, form factor-driven design pressures have been relieved, in part, by the increased use of high-density interconnects (HDIs), which enable more functionality per unit area than conventional PCBs. Leveraging finer lines, thinner materials, and laser-drilled vias, HDIs have played a crucial role in device miniaturization. However, the traditional PCB subtractive etch processing becomes very difficult for feature sizes below 3 mil trace/space. This forces PCB designs to become more complex as electronics packages shrink—adding extra routing layers, and microvia layers, and increasing the number of lamination cycles required, all of which impact yield, reliability, and thus cost.
March 09, 2022
Coupling on a multilayer PCB may be a good or bad thing. On one hand, close coupling of signal traces to reference planes and differential pair signals is the best way to prevent common mode radiation and to mitigate electromagnetic (EM) emission. But on the other hand, close coupling of unrelated signal traces can bring us grief with unintentional crosstalk caused by overlapping EM fields. In this month’s column, I will look at where close coupling should be used and where it should be avoided.
March 08, 2022
In 2022, PCB designers are faced with two big challenges: demands for increased performance and a condensed product footprint. So, what’s new? Columnist Barry Olney recalls back some 50-odd years ago the challenges for the electronics professional were much the same. "I had just become comfortable with valves and next we had diodes, transistors, and LEDs." This column chronicles these and other changes.
February 03, 2022
Way back in my early 20s, I was tasked with repairing Marconi HiPot testers. These ancient, bulky machines were basically high voltage generators used for testing the dielectric withstanding voltage or isolation of 50KV high voltage power transmission lines that are strewn across the countryside. Opening the box, you see a string of diodes and several huge, high voltage ceramic capacitors creating a voltage multiplier. I used to wind these up to a humming 60KV and they sure packed one hell of a punch (even when switched off) as I soon found out. This instilled in me the importance of spacing to isolate high voltage.
November 24, 2021
The growing popularity of wide bandgap (WBG) semiconductors, such as gallium nitride (GaN) and silicon carbide (SiC) has enabled components to achieve higher operating temperatures and power outputs than silicon-based technology. However, this has not eliminated the need for careful thermal management to evenly distribute the heat generated to avoid the formation of dangerous hot spots and to minimize power losses. The heat generated by integrated circuits poses great challenges, especially given today’s higher speeds, smaller board surface areas, and multiple devices populated on PCBs.
October 28, 2021
Most electronic products today are assembled using the no-clean soldering process. The need for no-clean solder pastes emerged in response to legislation against the use of ozone-depleting chemicals, and the appeal of removing the costly flux cleaning operations in the assembly of PCBs.
September 23, 2021
Power Distribution Network (PDN) planning is a relatively new technology that has become an essential, interrelated component of signal integrity analysis. However, mainstream PCB developers have yet to adopt PDN analysis as a common design process.
August 26, 2021
The role of fly-over cables is to isolate signals from the limitations of the PCB materials. As signal speeds increase, the dielectric material’s Df and Dk become an issue, and traces need to be shaped and routed perfectly, without skew, to avoid signal coupling, crosstalk, and electromagnetic compliance (EMC) issues.
July 20, 2021
A switchback is a 180° bend in a road, rail or path, especially one leading up the side of a mountain. Switchback also refers to a long trombone bend in a tuned serpentine trace. But, rather than increase the delay, of the signal, the switchback actually speeds it up due to the near (NEXT) and far-end (FEXT) crosstalk effects. In this month’s column, Barry Olney looks at why long, parallel switchbacks should be avoided.
June 10, 2021
Serial communication has been used long before computers ever existed. The telegraph system using Morse code is one of the first digital modes of communication. All you need is two connections, which makes it simple and relatively robust. Columnist Barry Olney explains how this relates to PCB design.
March 25, 2021
Today’s high-speed multilayer PCBs have multiple planes. The ground planes are used for shielding and to provide return current continuity. Whereas, closely coupled power/ground plane pairs provide low inductance power to the ICs and reduce the AC impedance and plane resonance of the Power Distribution Network (PDN).
February 16, 2021
Crosstalk is three dimensional and is dependent on the signal trace separation, the trace to plane(s) separation, parallel segment length, the transmission line load, and the technology employed. But, crosstalk also varies depending on the physical stackup configuration. In this month’s column, Barry Olney delves into the properties of microstrip and stripline crosstalk and how to mitigate the concern.
February 01, 2021
Stackup planning involves careful selection of materials and transmission line parameters to avoid impedance discontinuities, signal coupling, unintentional return paths, high AC impedance and excessive electromagnetic emissions. Materials used for the fabrication of multilayer PCBs, absorb high frequencies and reduce edge rates thus putting the materials selection process under tighter scrutiny. Ensuring that your board’s stackup and impedances are correctly configured is a good basis for stable product performance.
November 16, 2015
In the final part of the Stackup Planning series, I will look at 10-plus layer counts. The methodology I have set out in previous columns can be used to construct higher layer-count boards. In general, these boards contain more planes and therefore the issues associated with split power planes can usually be avoided. Also, 10-plus layers require very thin dielectrics, in order to reduce the total board thickness. This naturally provides tight coupling between adjacent signal and plane layers reducing crosstalk and electromagnetic emissions.
December 18, 2020
The majority of high-speed digital designs take at least two iterations to develop into a working product. However, multilayer boards can be designed to work right the first time with little additional effort. Barry Olney explains how design re-spins will continue to happen until designers make regular use of simulation software.
November 12, 2020
As the typical PCB design becomes more complex, so do the techniques and strategies required—not only to complete the design but also to create a functioning product that performs to specification. Barry Olney describes why PCB designers need to understand the underlying high-speed issues of the design based on simulation and then translate these into corresponding design constraints.
October 23, 2020
Electromagnetic energy is all around us. Barry Olney looks at how electromagnetic radiation can be emitted from the edges of planes in multilayer PCBs by the fringing fields possibly causing EMC issues.
September 15, 2020
Interconnect impedance is a trade-off between the variables, including trace width, trace (copper) thickness, dielectric thickness, and dielectric constant. Barry Olney continues with Part 6 of his stackup impedance planning series and looks at the correct process, as well as the consequences of bad decisions.
August 24, 2020
The speed of light is the one universal physical constant that we are yet to break. Barry Olney looks at how to simply measure the speed of light and how the wavelength of electromagnetic energy relates to the multilayer PCB.
August 03, 2020
The three most common termination strategies are series, end, and differential. In this column, Barry Olney elaborates on two particular cases of series termination that every PCB designer will come across.
July 15, 2020
A high-speed digital signal crossing a split in the reference plane impacts at least three aspects of design integrity: signal quality, crosstalk, and EMI. Barry Olney reviews the two common solutions, plus introduce a third optimal solution for high-speed design.
June 15, 2020
The term bandwidth was first used years ago in the RF world to represent the range of frequencies in a signal. In digital electronics, we also use the term to describe the signal spectrum since square waves are made up of numerous sine waves (harmonics) of the fundamental frequency. Barry Olney looks at the relationship between signal rise time and the bandwidth of a digital signal.
June 05, 2020
To control the impedance of high-speed signal interconnects, one first needs to predict the impedance of a specific multilayer stackup configuration. Barry Olney describes how a precision field solver is arguably the most accurate way to calculate the single-ended, edge-coupled, and broadside-coupled differential impedance.
April 23, 2020
Whenever a signal meets an impedance variation along a transmission line, there will be a reflection, which can seriously impact signal integrity. By understanding the causes of these reflections and eliminating the source of the mismatch, a design can be engineered with reliable performance. Barry Olney looks at how to effectively terminate transmission lines.
February 26, 2020
Decoupling capacitors are generally spread throughout the power distribution network (PDN). There are two distinct functions of capacitors that work in unison but in different domains. In this month’s column, Barry Olney examines impedance in the frequency domain and its impact on EMI.
March 05, 2020
Arguably, the most critical factor in high-speed PCB design is the impedance of the interconnect. We know that transmission line drivers must be matched to the impedance of the line for the perfect transfer of energy. Energy is never lost but rather transforms into other forms of energy. Specifically, in the case of an unmatched transmission line, energy can be transferred into heat, coupled into adjacent elements, reflected, or radiated. In this month’s column, Barry Olney looks at why interconnect impedance is so important to the correct performance of the system.
January 24, 2020
The simplistic approach to analyzing electronic circuits is to use the lumped element model. However, in reality, that is not the case. Barry Olney discusses the difference between the lumped element model and the distributed system.
January 02, 2020
As system performance requirements increase, the PCB designer’s challenges become more complex. The impact of lower core voltages, higher frequencies, and faster edge rates has forced us into the frequency domain. At first, signal integrity can look quite daunting, but if we take the time to absorb the key concepts, then it is like visualizing a multilayer PCB from a different perspective. In this month’s column, Barry Olney looks at the frequency domain.
October 16, 2019
Believe it or not, this is my 100th “Beyond Design” column. To wrap it up, I look back over the past 99 columns and reflect on what I believe to be the most enlightening for high-speed PCB designers, counting down in reverse order of preference.
September 25, 2019
Electric fields and magnetic fields play an equal role in moving energy in a multilayer PCB. EM fields also move energy in free space, but not at DC. The presence of voltage implies that there is an electric field, and the changing of that electric field creates a magnetic field. What may not be appreciated is that moving a voltage between two components requires moving energy (not a signal), which requires the existence of both electric and magnetic fields.
August 14, 2019
In my previous column series on stackup planning, I described the traditional stackup structures that use a combination of signal and power/ground planes. But to achieve the next level in stackup design, one needs to not only consider the placement of signal and plane layers in the stackup, but also visualize the electromagnetic fields that propagate the signals through the substrate.
July 22, 2019
With today’s rapid product development cycles and time-to-market pressures, PCB designers are pushed to their limit. This situation leaves many developers with the question of how to ensure that their high-speed digital design performs to expectations, is stable given all possible diverse environments, and is reliable over the products projected life cycle. As developers avoid the expense and delays of re-engineering the product, they look to employ design integrity methodologies during the design phase.
June 10, 2019
Digital design has entered a new realm. Modern high-speed design (HSD) not only requires the designer to continuously break new ground on a technical level but also requires the designer to account for significantly more variables associated with higher frequencies, faster transition times, and higher bandwidths. Ignoring signal and power integrity and electromagnetic compatibility invites schedule delays and increases development costs and the possibility of never succeeding to build a functional product, which is a career-limiting strategy.
May 22, 2019
The ability to simulate complex PCB design has become a critical factor in the success of a project. Today’s high-speed processors and SERDES interfaces coupled with sometimes unrealistic time-to-market requirements are pushing design teams toward more nimble development processes. However, there is no point in completing a design on time if it does not work!
April 29, 2019
Skin effect and the proximity effect are manifestations of the same principle—magnetic lines of flux cannot penetrate a good conductor. The difference between them is that skin effect is a reaction to the magnetic fields generated by current flowing within a conductor, while proximity effect is generated by current flowing in other nearby traces or planes. The frequency at which both effects begin to occur is the same. In this month’s column, I will focus on the proximity effect.
March 25, 2019
PCB substrates are all around us in every gadget we use. The substrate may be rigid or flexible, or a combination of both. It is a carrier for the electronic devices and the signal and power interconnects and is usually planar in structure with conductors separated by insulating dielectric materials. However, each product has a specific performance requirement and may need a distinct type of substrate to comply with the product’s specifications.
February 14, 2019
The final part of the 10 fundamental rules of high-speed PCB design focuses on board-level simulation encompassing signal integrity, crosstalk, and electromagnetic compliancy. Typically, a high-speed digital design takes three iterations to develop a working product. However, today, the product life cycle is very short, and therefore, time to market is of the essence. The cost per iteration should not only include engineering time but also consider the cost of delaying the products market launch.
January 02, 2019
Part 4 of the 10 fundamental rules of high-speed PCB design deals with the routing of critical signals and return path discontinuities. Needless to say, matched delay and length, differential pairs, and other critical signals should be routed first with the precision they require before less important low-speed and static signals are completed. Maintaining this priority is imperative.
December 13, 2018
Planes are essential in today’s high-speed multilayer PCBs. Unfortunately, the number of power supplies required is increasing dramatically with IC complexity. Now, accounting for them all has become a real challenge. The high number of supplies generally leads to higher layer count substrates. In the past, we used to have more signal routing layers than planes; the opposite is now the case when the majority of stackup layers are reserved for power distribution. Although this increases the cost, it may be a godsend because it provides segregation of critical signals to avoid crosstalk and reduces radiation.
November 15, 2018
In last month’s column, I introduced the 10 fundamental rules of high-speed PCB design. The first rule was to establish design constraints before commencing the design. This prime strategy sets constraints upfront based on pre-layout analyses or recommendations and guidelines and is integral to the design flow to maintain the established requirements. This month, I will elaborate on the importance of controlling the impedance and floor planning the placement based on connectivity.
August 06, 2018
Over the years, I have focused on high-speed design, signal and power integrity, and EMC design techniques in a plethora of published technical articles—all of which have key points to consider and present a tremendous amount of information to absorb. In my next few columns, I will elaborate on ten of the most important considerations to embrace to achieve successful high-speed PCB designs that perform reliably to expectations.
January 04, 2016
A high-speed digital power distribution network (PDN) must provide a low inductance, low impedance path between all ICs on the PCB that need to communicate. In order to reduce the inductance, we must also minimize the loop area enclosed by the current flow. Obviously, the most practical way to achieve this is to use power and ground planes in a multilayer stackup. In this two-part column, I will look at the alternatives to planes, why planes are used for high-speed design, and the best combination for your application.
September 10, 2018
Years ago, when clock frequencies were low and signal rise times were slow, selecting a dielectric material for your PCB was not difficult; we all just used FR-4. And we didn’t really care about the properties of the materials. However, with today’s multi-gigabit designs and their extremely fast rise times and tight margins, precise material selection is crucial to the performance of the product. Materials used for the fabrication of the multilayer PCB absorb high frequencies and reduce edge rates, and that loss in the transmission lines is a major cause of signal integrity issues. But we are not all designing cutting-edge boards and sometimes we tend to over-specify requirements that can lead to inflated production costs.
August 22, 2018
What is an acceptable level of crosstalk? That depends on the technology being used, and this level has changed quite dramatically over the years, going from TTL logic devices to today’s high-speed Gbps devices. In this month’s column, I will delve into the threshold of acceptable crosstalk and how to mitigate its impact on high-speed designs.
July 18, 2018
DDR3/4 fly-by topology is similar to daisy chain or multi-drop topology, but it includes very short stubs to each memory device in the chain to reduce the reflections. The advantage of fly-by topology is that it supports higher-frequency operation and improves signal integrity and timing on heavily loaded signals. If you are employing high-frequency DDR4, then the bandwidth of the channel needs to be as high as possible. However, with today’s extremely fast edge rates, the sequencing of the stubs and the end termination, and the associate load, can make a measurable difference in signal quality. In this month’s column I will look at how best to route DDR3/4 fly-by topology.
June 27, 2018
Electromagnetic radiation from digital circuits can occur as either differential mode or common mode. Differential mode is typically equal and opposite and therefore any radiating fields will cancel. Conversely, common-mode radiation from two coupled conductors is identical. It does not cancel, but rather reinforces.
May 30, 2018
There is an old saying, “You get what you pay for.” Does this mean that you should not expect too much from free software? After all, free software usually comes at a price: the results might be inaccurate, the software might be time-consuming to set up and use, and the tool might overlook issues that require a revision to mitigate. But HyperLynx DRC is the exception to the rule.
April 27, 2018
Positioned at our usual table at the local pub in Melbourne, Australia one night in 1972, the boys and I laughed as a school boy, guitarist Angus Young, set up equipment and tuned a guitar. We assumed he was one of the roadies, and were gobsmacked when AC/DC unexpectedly fired up. This month, I will discuss AC coupling (or is it DC blocking?) of high-speed serial links as my taste in music has matured over the years.
March 13, 2018
Before you worry (or not) about post-layout PDN DC drop analysis, you first need to design an effective PDN pre-layout. Smart designers prevent problems before they arise, while others waste time and resources trying to fix the mess that they inadvertently created due to their lack of due diligence. Engineers and PCB designers need to visualize and understand how and where the currents flow.
February 22, 2018
Ground bounce, or more precisely, supply bounce, is the voltage produced between two points in the power delivery path. It is fundamentally related to the total inductance of the current path and shared return paths and the instantaneous surge current delivered by the power supply. Once again, we find that inductance is the covert enemy of the high-speed PCB designer. It is the primary cause of simultaneous switching noise and electromagnetic radiation. As edge rates continue to increase, the impact of intrinsic electrical characteristics become more pronounced. In this month’s column, Barry Olney looks at supply bounce and how to minimise the impact on high-speed digital circuits.
January 24, 2018
A transmission line does not carry the digital signal itself but rather, guides electromagnetic energy from one point to another. Signals travel at the same speed, given the same medium. However, the microstrip (outer layer) traces are embedded in a mélange of dielectric material, solder mask, and air. This lowers the effective dielectric constant and increases the propagation speed compared to that of stripline (inner layer) traces. This month, Barry Olney looks at the disparity in signal propagation in multilayer PCBs.
January 05, 2018
As PCB transmission frequencies head toward 100GHz, copper interconnect is reaching its performance threshold. Ultimately, it is dielectric loss, copper roughness, and data transfer capacity that are the culprits. However, the biggest performance restriction for PCB interconnects is the size of the conductor. Metallic waveguides, on the other hand, are a better option than traditional transmission lines, but they are bulky, expensive and non-planar in nature. However, recently, substrate integrated waveguides (SIW) structures have emerged as a viable alternative.
December 06, 2017
At low frequencies, traces and components on a PCB behave simply as lossless lumped elements—as taught in Circuit Theory 101. But as the frequency increases, the copper trace and adjacent dielectric(s) become a transmission line, the skin effect forces current into the outer regions of the conductor and frequency dependant losses impact on the quality of the signal. The PCB trace now behaves as a distributed system with parasitic inductance and capacitance characterized by delay and scattered reflections. The behavior we are now concerned about occurs in the frequency domain rather than the familiar time domain. This is the real world of high-speed design.
October 31, 2017
Plane pairs in multilayer PCBs are essentially unterminated transmission lines—just not the usual traces or cables we may be accustomed to. They also provide a very low-impedance path, which means that they can present logic devices with a stable reference voltage at high frequencies. But as with signal traces, if the transmission line is mismatched or unterminated, there will be standing waves: ringing. The bigger the mismatch, the bigger the standing waves and the more the impedance will be location dependent.
September 12, 2017
As IC die sizes continue to compact due to demand for smaller and faster technology, and as switching speeds continue to improve, rise and fall times are creeping down into the sub-nanosecond realm, a territory previously reserved for microwave engineers. It is a common quandary that established products that have worked flawlessly for years suddenly stop performing reliably, due to a new batch of ICs that is used in the latest production run.
August 23, 2017
In an ideal world, the entire signal waveform would uniformly decrease in amplitude, over distance, and the rise time would remain constant. This reduction in amplitude could easily be compensated for by applying gain (cranking up the volume) at the receiver. However, as signals propagate along a lossy transmission line, the amplitude of the high-frequency components is reduced, in magnitude, whereas the low-frequency components are unaffected. This selective attenuation of high-frequency components is the root cause of ISI and collapse of the signal eye.
July 26, 2017
The primary issue is generating optimal FPGA pin assignments that do not add vias and signal layers to a PCB stackup or increase the time required to integrate the FPGA with the PCB. Engineers generally do not consider FPGA pin assignments that expedite the PCB layout. Hundreds of logical signals need to be mapped to the physical pin-out of the device, and they must also harmonize with the routing requirements whilst maintaining the electrical integrity of the design.
June 21, 2017
I guess we all think of a copper plane as a thick, solid plate of copper that can basically handle any amount of current we sink into it. It also serves to make the circuit layout easier, allowing the PCB designer to ground anything, anywhere without having to run multiple tracks. That may well be the case with DC or very low-frequency analog circuits, but certainly not in the case of high-speed design.
May 29, 2017
PCB designers generally take great care to ensure that critical signals are routed exactly to length from the driver to the receiving device pins, but take little care of the return current path of the signal. Current flow is a “round trip” and the critical issue is delay, not length. If it takes one signal longer for the return current to get back to the driver—around a gap in the plane for instance—then there will be skew between the critical timing signals. Return path discontinuities (RPDs) can create large loop areas that increase series inductance, degrade signal integrity and increase crosstalk and electromagnetic radiation.
April 26, 2017
The classic coplanar waveguide (CPW) is formed by a microstrip conductor strip separated from a pair of ground planes pours, all on the same layer, affixed to a dielectric medium. In the ideal case, the thickness of the dielectric is infinite. But in practice, it is thick enough so that electromagnetic fields die out before they get out of the substrate. CPWs have been used for many years in RF and microwave design as they reduce radiation loss, at extremely high frequencies, compared to traditional microstrip. And now, as edge rates continue to rise, they are coming back into vogue. This month, I will look at how conformal field theory can be used to model the electromagnetic effects of microstrip coplanar waveguides.
April 03, 2017
I originally came up with the concept of an online impedance calculator way back in 1994 when I was working on the PCB layout and design for a new generation of SPARC 20 servers. We basically reformatted a Sun SPARC 20 pizza box motherboard to fit into a 5.25-inch drive slot.
February 24, 2017
The impact of lower core voltages and faster edge rates has pushed the frequency content of typical digital signals into the gigahertz range. Consequently, the performance of decoupling capacitors, that are required to complement the power distribution network (PDN) and curb signal induced fluctuations, must also be extended up into this range. However, rudimentary design rules, adequate for frequencies below 100MHz, may not be suitable for today's high-speed digital circuits. The symptoms of an inadequate PDN design are increased power supply noise, crosstalk and electromagnetic radiation leading to poor performance and possibly intermittent operation.
January 25, 2017
EDA companies generally innovate through acquisitions and mergers as it is easier to buy new technology than expend time and resources developing a product and risk losing market share. However, some tend to focus on partnering with other EDA vendors rather than acquisition. But this leaves them vulnerable to outside influence. Many small EDA start-ups develop niche technology, an innovation that adds value in a specific area. But their fast growth soon reaches a burn-rate threshold whereby their momentum can no longer be sustained.
December 21, 2016
When common sense fails, tap into your uncommon sense. Basically, common sense teaches us that the way it has always been done is the right way, and that’s just how things are. Following common sense is usually the safe way to go. But the people who are really making a difference in the world are usually the people who try something new. Tapping into our uncommon sense allows us to take a look at things we often take for granted.
December 15, 2015
Ask any group of PCB designers what they think of autorouters and the majority will say that they do not use them because they do not work. I have been battling this mindset for over 20 years now and it still persists today, even with the dramatic advances in routing technology. This way of thinking generally comes from those designers who use the entry-level tools that have limited routing capability. But even the most primitive autorouter may have some useful features. It’s all about changing that mindset of the designer and having a crack at it.
November 09, 2016
How do we ensure that our high-speed digital design performs to expectations, is stable given all possible diverse environments, and is reliable over the product’s projected life cycle? For the perfect transfer of energy and to benefit from the highest possible bandwidth, the impedance of the driver must match the impedance of the transmission line and be constant along its entire length.
August 17, 2016
With the changing demographics, the old-timers in our industry—the master PCB designers—are about to retire and hand over the exacting job of PCB design to the Gen-X and Ys. These generations, shaped by technology, will tackle the most demanding designs without possessing the experience that we veterans benefit from. And to top it off, these up-and-coming designers will be degreed engineers who have to cope with both design and layout tasks as the specialized PCB designer’s positions are phased out.
June 29, 2016
There has been a lot of activity in the field of artificial intelligence recently, with such developments as voice recognition, unmanned autonomous vehicles and data mining to list a few. But how could AI possibly influence the PCB design process? This month, Barry Olney will take a look at the endless possibilities.
May 04, 2016
Years of experience with one EDA tool obviously develops efficiency, whether the tool be high-end feature-packed or basic entry-level. And one becomes accustomed to the intricacies of all the good and bad features of their PCB design tool. However, there comes a time, with the fast development pace of technology, that one should really consider a change for the better to incorporate the latest methodologies. This month, I will look at productivity issues that impede the PCB design process.
September 02, 2015
Following on from the first Stackup Planning columns, this month we will look at higher layer-count stackups. The four- and six-layer configurations are not the best choice for high-speed design. In particular, each signal layer should be adjacent to, and closely coupled to, an uninterrupted reference plane, which creates a clear return path and eliminates broadside crosstalk. As the layer count increases, these rules become easier to implement but decisions regarding return current paths become more challenging.
August 12, 2015
In Part 1 of the Stackup Planner series, Barry Olney looked at how the stackup is built, the materials used in construction and the lamination process. And he set out some basic rules to follow for high-speed design. It is important keep return paths, crosstalk and EMI in mind during the design process. Part 2 follows on from this with definitions of basic stackups starting with four and six layers. Of course, this methodology can be used for higher layer-count boards—36, 72 layers and beyond.
June 24, 2015
The PCB substrate that physically supports the components, links them together via high-speed interconnects and also distributes high-current power to the ICs is the most critical component of the electronics assembly. The PCB is so fundamental that we often forget that it is a component and, like all components, it must be selected based on specifications in order to achieve the best possible performance of the product. Stackup planning involves careful selection of materials and transmission line parameters to avoid impedance discontinuities, unintentional signal coupling and excessive electromagnetic emissions. Barry Olney explains.
June 03, 2015
Controlled impedance—it’s all about transmission lines. For perfect transfer of energy, the impedance of the driver must match the transmission line. A good transmission line is one that has constant impedance along the entire length of the line, so that there are no mismatches resulting in reflections. But unfortunately, drivers do not have the exact impedance to match the line (typically 10–35 ohms) so terminations are used to balance the impedance, match the line and minimize reflections.
May 12, 2015
Currently, power integrity is just entering the mainstream market phase of the technology adoption life cycle. The early market is dominated by innovators and visionaries who will pay top dollar for new technology, allowing complex and expensive competitive tools to thrive. However, the mainstream market waits for the technology to be proven before jumping in. Power distribution network (PDN) planning was previously overlooked during the design process, but it is now becoming an essential part of PCB design. But what about the learning curve? The mainstream market demands out-of-the-box, ready-to-use tools.
April 08, 2015
Creating split planes or isolated islands in the copper planes of multilayer PCBs at first seems like a good idea. Today’s high-speed processors and FPGAs require more than six or seven different high-current power sources. And keeping sensitive analog circuitry isolated from those nasty, fast, digital switching signals seems like a priority in designing a noise-free environment for your product. Or is it?
March 11, 2015
At frequencies below 1GHz, the effect of copper surface roughness on dielectric loss is negligible. However, as frequency increases, the skin effect drives the current into the surface of the copper, dramatically increasing loss. When the copper surface is rough, the effective conductor length extends as current follows along the contours of the surface up and down with the topography of the copper surface.
January 07, 2015
In his last column, columnist Barry Olney looked at the effects of crosstalk, timing, and skew on signal quality. This month, he continues to discuss signal integrity, in particular where most designers go wrong and how to avoid common pitfalls.
December 03, 2014
In Part 1 of his signal integrity series, Columnist Barry Olney examined how advanced IC fabrication techniques have created havoc with signal quality, and radiated emissions. Part 2 covers the effects of crosstalk, timing, and skew on signal quality.
August 27, 2014
In his latest column, Barry Olney looks at what types of materials are commonly used for digital design, and how to select an adequate material to minimize costs. He advises, "Of course, selecting the best possible material will not hurt, but it may blow out the costs."
July 30, 2014
Concurrent design is the practice of developing products in which the different stages run simultaneously rather than consecutively. It decreases product development time and also time-to-market, leading to improved productivity and reduced costs. The practice is a relatively new process strategy and although the initial implementation can be challenging, the competitive advantage means it is beneficial in the long term.
June 04, 2014
Contrary to common belief, the transmission line does not carry the signal itself but rather guides electromagnetic energy from one point to another. It is the movement of the electromagnetic field or energy, not voltage or current that transfers the signal. The voltage and current exist in the conductor, but only as a consequence of the field being present as it moves past.
January 04, 2016
One of the greatest myths in PCB design is that we only have to route signal traces from pin-to-pin to make a complete connection. And, that ensuring these traces have matched delay is the only timing issue we need to consider. However, current is not a one way trip--it must complete the circuit back to the source to provide the round-trip current loop.
March 19, 2014
In a previous column, Barry Olney discussed various termination strategies and concluded that a series terminator is best for high-speed transmission lines. But, what if there are a number of loads--how should these transmission lines be routed? For perfect transfer of energy and to eliminate reflections, the impedance of the source must equal the impedance of the trace(s) to the load.
February 12, 2014
In Part 1 of this column, Barry Olney looked closely at how to choose the right capacitor to lower the AC impedance of the power distribution network (PDN) at a particular frequency. This month he continues from there looking at the one-capacitor-value-per-decade and optimized value approaches.
January 15, 2014
In his first column on power distribution network (PDN) planning, Barry Olney described the basics of planning for low AC impedance between the planes to reduce supply noise and provide reliable performance. This new column will focus on capacitor selection and three alternative approaches to analyzing the PDN.
December 18, 2013
While high-speed SERDES serial communications seems to currently be at the cutting edge of technology, maybe it will shortly become an antiquated low-speed solution--even speed-of-light fiber optics may become obsolete. This month, Columnist Barry Olney looks at how quantum physics is transforming our world and how it could affect PCB design.
November 26, 2013
The impedance of the trace is extremely important, as any mismatch along the transmission path will result in a reduction in signal quality and possibly the radiation of noise. Mismatched impedance causes signals to reflect back and forth along the lines, which causes ringing at the load.
November 13, 2013
Many challenges face the engineer and PCB designer working with new technologies. For SERDES--high-speed serial links--loss, in the transmission lines, is a major cause of signal integrity issues. Reducing that loss, in its many forms, is not just a matter of reducing jitter, bit error rate (BER) or inter-symbol interference (ISI).
October 16, 2013
"If you are a digital designer, you will eventually have SI problems whether you like it or not. But all is not lost. If you learn to work with these issues, then you will soon become proficient with high-speed design," says columnist Barry Olney.
September 18, 2013
Design for profit (DFP) is gaining more recognition as it becomes clear that the cost reduction of printed circuit assemblies cannot be controlled by manufacturing engineers alone. The PCB designer now plays a critical role in cost reduction, says columnist Barry Olney.
August 28, 2013
Differential skew has become a performance limiting issue for high-speed SERDES links. The operation of such links involves significant amounts of signal processing to recover clocks, reduce the effects of high-frequency losses, reduce inter symbol interference, and improve signal-to-noise ratio.
August 21, 2013
No matter what type of memory used in a design, the clock should always have the longest delay. This ensures that the other signals have time to settle before the clock arrives at the device and samples the bus.
July 17, 2013
In his last column, Barry Olney discussed how magnetic fields revolve around the earth and how these fields are also present in a multilayer board. Part 2 of "Electromagnetic Fields" will look at how the phenomena influence transmission lines and how they can be applied in a BEM field solver.
June 19, 2013
Our whole world literally revolves around electromagnetic fields. Columnist Barry Olney says much insight into high-speed PCB design can be gained by understanding the behavior of transmission lines and the influence of their associated electromagnetic fields.
May 29, 2013
Developing the practice of performing a post-mortem analysis on every project facilitates a culture of continuous improvement. This embedded culture of ongoing, positive change is the best way to ensure long-term success according to Barry Olney.
April 03, 2013
When analyzing customer designs, Barry Olney often finds that crosstalk is a recurrent issue with manually routed boards. Autorouters are ideal for digital designs as they tend to use all available space, thus reducing the possibility of crosstalk due to proximity. With interactive control and the process outlined in this column, an autorouter can be a powerful productivity tool.
February 20, 2013
Cross-probing between the schematic and PCB provides a valuable mechanism for design, review, verification and testing of PCBs, but it is most powerful during interactive placement and routing.
January 09, 2013
The key to building the optimum board stackup is determining how and where the return currents flow. But it is also just as important to have the board constructed to your specifications, having engineering drive fabrication – rather than delegating impedance control and material selection to the fab shop.
October 17, 2012
Controlling the placement of devices limits maximum trace length, reduces flight time delay and skew, and assists in compliance to timing specifications. Maybe some of the advice that follows will help ensure you get it right first time.
September 19, 2012
The key to a successful mixed digital-analog design is functional partitioning, understanding the current return path, routing control and management, and using a common ground plane. Barry Olney takes us into the mix this week.
August 22, 2012
Pre-layout simulation allows a designer to identify and eliminate signal integrity, crosstalk and EMC issues early in the design process. This is the most cost-effective way to design a board. Barry Olney explains why in this case, sooner is better than later.
July 18, 2012
The power distribution network (PDN) of a multilayer PCB should distribute low noise and stable power to ICs over the entire board area. Ideally, the AC impedance, between power and ground, should be zero, up to the maximum operating frequency for reliable performance.
May 23, 2012
Board-level simulation reduces costs by identifying potential problems at the conceptual stage, so that they can easily be avoided, and then catching any further issues during the design process, eliminating the potentially disastrous final-stage changes. By Barry Olney.
May 09, 2012
Post-layout simulation covers batch mode simulation, which automatically scans nets on an entire PCB, flagging signal integrity, crosstalk and EMC hot spots. While post-layout simulation can be used for disaster recovery, ideally this process is completed during the design process. Barry Olney explains.
April 04, 2012
This month, Barry Olney discusses the traditional serpentine routing for matched length signals and looks at a potentially desirable alternative, the octagonal spiral pattern, that can be especially useful if real estate is at a premium.
February 16, 2012
In this column, we will tackle the "microstripum crosstalkus radiarta," an insidious little creature more commonly known as microstrip crosstalk radiation. Thriving on the outer layers of PCBs, crosstalk, like fleas on a dog, can't be eliminated completely or forever; the key is learning how to minimize and control it.
November 03, 2011
Is radiation actually attenuated when high-speed signals are routed embedded between the planes? There are specific constraints and factors to consider when assessing just how much attenuation we actually get from embedding the high-speed signals between the planes. Barry Olney breaks it all down.
September 14, 2011
By definition, a ground plane in a PCB is a layer of copper that appears to most signals as an infinite ground potential. This month, we discuss best practices for selecting reference planes and routing pairs for high-speed designs on multilayer boards.
August 11, 2011
Unintended noise can be a formidable enemy, and it is best to totally eliminate, control or attenuate the emissions at the source. Controlling the impedance of the substrate and terminating the transmission line to match the impedance of the respective source and load significantly reduces radiated noise, virtually eliminating the noise at the source.
July 21, 2011
This second and final part in a series examining PCB design techniques will look at a comparison of DDR2 and DDR3, DDR3 design guidelines, pre-layout analysis, critical placement, design rules, and post-layout analysis.
January 15, 2014
In his first column on power distribution network (PDN) planning, Barry Olney described the basics of planning for low AC impedance between the planes to reduce supply noise and provide reliable performance. This new column will focus on capacitor selection and three alternative approaches to analyzing the PDN.
January 04, 2016
While high-speed SERDES serial communications seems to currently be at the cutting edge of technology, maybe it will shortly become an antiquated low-speed solution--even speed-of-light fiber optics may become obsolete. This month, Columnist Barry Olney looks at how quantum physics is transforming our world and how it could affect PCB design.
February 12, 2014
In Part 1 of this column, Barry Olney looked closely at how to choose the right capacitor to lower the AC impedance of the power distribution network (PDN) at a particular frequency. This month he continues from there looking at the one-capacitor-value-per-decade and optimized value approaches.
April 09, 2014
In previous columns, Columnist Barry Olney has discussed matched length routing and how matched length does not necessarily mean matched delay. But, all design rules, specified by chip manufacturers regarding high-speed routing, specify matched length--not matched delay. In this month's column he takes a look at the actual differences between the two.
May 04, 2014
One of the greatest myths in PCB design is that we only have to route signal traces from pin-to-pin to make a complete connection. And, that ensuring these traces have matched delay is the only timing issue we need to consider. However, current is not a one way trip--it must complete the circuit back to the source to provide the round-trip current loop.
January 04, 2016
Contrary to common belief, the transmission line does not carry the signal itself but rather guides electromagnetic energy from one point to another. It is the movement of the electromagnetic field or energy, not voltage or current that transfers the signal. The voltage and current exist in the conductor, but only as a consequence of the field being present as it moves past.
June 25, 2014
PCB surface finishes vary in type, price, availability, shelf life, assembly process, and reliability. While each treatment has its own merits, electroless nickel immersion gold (ENIG) finish has traditionally been the best fine pitch (flat) surface and lead-free option for SMT boards over recent years. But, unfortunately, nickel is a poor conductor with only one third the conductivity of copper.
January 04, 2016
Concurrent design is the practice of developing products in which the different stages run simultaneously rather than consecutively. It decreases product development time and also time-to-market, leading to improved productivity and reduced costs. The practice is a relatively new process strategy and although the initial implementation can be challenging, the competitive advantage means it is beneficial in the long term.
August 27, 2014
In his latest column, Barry Olney looks at what types of materials are commonly used for digital design, and how to select an adequate material to minimize costs. He advises, "Of course, selecting the best possible material will not hurt, but it may blow out the costs."
October 22, 2014
As system performance increases, the PCB designer’s challenges become more complex. The impact of lower core voltages, high frequencies, and faster edge rates has forced us into the high-speed digital domain. But in reality, these issues can be overcome by experience and good design techniques. If you don’t currently have the experience, then listen-up.
December 03, 2014
In Part 1 of his signal integrity series, Columnist Barry Olney examined how advanced IC fabrication techniques have created havoc with signal quality, and radiated emissions. Part 2 covers the effects of crosstalk, timing, and skew on signal quality.
The Shaughnessy Report: Solving the Data Package Puzzle
Fresh PCB Concepts: Key Considerations for Reliability, Performance, and Compliance in PCBs
Elementary Mr. Watson: Navigating RF—A Glide Path Approach to Design Success
