Trouble in Your Tank

Column from: Michael Carano

Mike brings over 40 years of electronics industry experience with special expertise in manufacturing, performance chemicals, metals, semiconductors, medical devices, and advanced packaging.

A recognized thought leader, subject matter expert (SME), and author, Mike holds 7 US and 20 foreign patents. He has published over 190 articles and presented peered reviewed technical papers all over the world.

Mike is currently a Technical and Market Intelligence consultant to IPC and a project facilitator  for HDP User Group international.

Mike has served on more than 20 IPC Standards committees, and has served 14 years as a member of the IPC Board of Directors. Mike has developed multiple professional development courses for IPC including the Advanced Trouble Shooting and Defect Analysis for Printed Circuit Boards.

In 2014 Mike was elected to the IPC Raymond E. Pritchard Hall of Fame, and later recognized for his standards work with Mike’s awarding of the Dieter Bergman Fellowship award and most recently the ANSI Finegan Medal. Previously Mike was the VP of Technology Business Development at RBP Chemical Technology, and the Global Director of R&D and Applications Engineering for the OM Group. He holds a B.A. in Chemistry and an M.B.A.


Connect:
October 01, 2024

Trouble in Your Tank: Interconnect Defect—The Three Degrees of Separation

It has been well documented that, with a very expensive and complex printed circuit board, thermal and mechanical excursions often find weaknesses. A lack of robustness and poor process control often leads to the exploitation of those weaknesses. An interconnect defect (ICD) often goes undetected until the printed circuit board reaches the final assembly stage or undergoes multiple thermal cycles, including interconnect stress tests or thermal shock. It is impossible to rework the ICD defect. But unlike voids, if detected in time, the panels can be reprocessed.
September 11, 2024

Trouble in Your Tank: Things You Can Do for Better Wet Process Control

For 40 years, I have been involved in the printed circuit board, circuit board assembly, and semiconductor technology segments, preaching about minimizing defects and improving yields. This is especially true as technology becomes increasingly complex, and additional focus must be placed on yield improvements. Process management and wet process control must be front and center, so it’s quite interesting and timely to talk about wet process control and management for this month’s issue. This theme fits quite well with today's global events. For this industry, the technical curve has steepened dramatically in the past few years.
August 06, 2024

Trouble in Your Tank: Processes to Support IC Substrates and Advanced Packaging, Part 5

Direct metallization systems based on conductive graphite or carbon dispersion are quickly gaining acceptance throughout the world. Indeed, the environmental and productivity gains one can achieve with this process are outstanding. In today’s highly competitive and litigious environment, direct metallization reduces costs associated with compliance, waste treatment, and legal issues related to chemical exposure. What makes these processes leaders in the direct metallization space? This is detailed below.
July 16, 2024

Trouble in Your Tank: Materials for PWB Fabrication—Drillability and Metallization

Laminate materials are the building blocks on which printed circuit boards are manufactured. Circuit board designers rely on the critical electrical properties of the materials to design the interconnects, and with the drive toward IoT (internet of things), autonomous driving, and virtual and augmented reality, material properties take on a very high level of importance.
March 19, 2024

Trouble in Your Tank: Supporting IC Substrates and Advanced Packaging, Part 5

Direct metallization systems based on conductive graphite or carbon dispersion are quickly gaining acceptance worldwide. Indeed, the environmental and productivity gains one can achieve with these processes are outstanding. In today’s highly competitive and litigious environment, direct metallization reduces costs associated with compliance, waste treatment, and legal issues related to chemical exposure. What makes these processes leaders in the direct metallization space?
February 08, 2024

Trouble in Your Tank: Electrodeposition of Copper, Part 6

Electrodeposition comes down to fundamentals. In the early days of plating, many users considered the nuances of metallization as black magic. Those days are long gone. Having a thorough understanding of the critical parameters that influence electrodeposition will determine success.
January 10, 2024

Trouble in Your Tank: Electrolytic Copper Plating, Part 5

In a previous column on the fundamentals of electrolytic copper plating of printed circuit boards, the subject matter covered the general function of organic addition agents and the role of these additives on the grain structure, plating uniformity, and physical properties of the subsequent copper deposit. Here, I will explore the many other critical plating parameters that influence throwing power, copper deposit thickness, and metallurgical properties. In a future column, I will explore the additives and their functionality in more detail.
September 28, 2023

Trouble in Your Tank: Processes to Support IC Substrates and Advanced Packaging, Part 4

In a previous column, the critical process of desmear and its necessity to ensure a clean copper surface connection was presented. Now, my discussion will focus on obtaining a void-free and tightly adherent copper plating deposit on these surfaces. After the desmear process, the task is to insure a continuous, conductive, and void-free deposit on the via walls and capture pad. Today, there are several processes that can be utilized to render vias conductive.
August 11, 2023

Trouble in Your Tank: Processes to Support IC Substrates and Advanced Packaging, Part 3

In two previous columns, I explored several of the key competencies and processes required to successfully jump into IC substrates. In this edition, the key process of desmear will be explored. These processing steps require additional improvements over normal through-holes due to small diameter through-holes and blind vias. Getting process chemistries down into these small holes can be very difficult, especially if they have any trapped air bubbles.
June 06, 2023

Trouble in Your Tank: Electrodeposition of Copper, Part 4—Addition Agents

I’ve spent a good part of my career working on disciplines such as process control and technology management, and troubleshooting complex issues in electronics manufacturing. I also spent quite a bit of time formulating chemical processes and understanding the underlying principles of what makes these processes function the way they do. Everything is connected. It’s all about the entire process and its various constituents.
May 22, 2023

Trouble in Your Tank: Lead-free and the Fabrication Challenge, Part 1

A thick, high layer count multilayer is one of the hardest printed circuit boards to adapt to lead-free assembly processes. The reason: Multilayers often have through-hole and hand-soldered components and require two or more rework cycles. The higher reflow temperatures and slower wetting of lead-free solders place an enormous strain on the laminate and copper-plated hole barrel. In many cases, the boards cannot be assembled reliably, even with newer, higher thermal performance FR-4s.
March 28, 2023

Trouble in Your Tank: Processes to Support IC Substrates and Advanced Packaging, Part 2

In last month's column, this author framed up the initial challenges for the PWB fabricator to be successful in producing IC substrates to support advanced packaging. In this month’s feature, the author will explore two more areas of processing that fabricators need to master: Imaging/developing, and etching.
March 07, 2023

Trouble in Your Tank: Processes to Support IC Substrates, Advanced Packaging—Part 1

There has been much written and discussed over the last 18 months relating to semiconductor fabrication and the well-founded concerns that the U.S., in particular, has fallen behind in domestic chip manufacturing. In response to this issue, the United States government has enacted the CHIPS for America Act. Funding under this legislation is designed to drive more chip fabrication domestically. While this is all fine and good, once these advanced chips are manufactured, where will they go? As has been said ad nauseum, “Chips don’t float.”
January 09, 2023

Trouble in Your Tank: Revisiting the Art and Science of Photoresist Stripping

As circuits become more compact, circuit lines and the spaces between them are becoming finer. As the distances between these lines decrease, copper over-plating is more likely to have a deleterious effect on photoresist stripping, which can lead to shorts on costly fine-line PCBs. PCB designers, for example, must attempt to squeeze increasingly more amounts of information onto a smaller board. In practical terms, this means that circuits are becoming more compact; circuit lines and the spaces between them are becoming finer. As the distances between these lines decrease, copper overplating is more likely to have a deleterious effect on photoresist stripping.
November 09, 2022

Trouble in Your Tank: Success in Photolithography Starts With Surface Preparation

The photolithography process defines the circuitry on the panel. As one may surmise, the imaging process used in the fabrication of high density and ultra high-density circuity has made significant advances over the last decade—and just in time. With finer lines and spaces as well as more attention to fabrication of printed wiring advanced packaging substrates. However, as is so true of many of the processes in PWB fabrication, up and down stream processes can and will influence what happens in a particular process.
October 06, 2022

Trouble in Your Tank: Electrodeposition of Copper, Part 3—Plating Distribution and Throwing Power

Success in the plating room rests largely on the understanding of and the application of those critical principles that govern the process of electrodeposition, or electroplating as it is often referred. This month, I look at the fundamentals of plating distribution and throwing power, and what that means for the circuit board fabricator. There are many factors that influence the flow of current in the electroplating cell and ultimately the distribution of the metal across the part along with the concept of throwing power.
August 15, 2022

Trouble in Your Tank: Electrodeposition of Copper, Part 2

If one thought that electroless copper and other metallization systems were complex and the deep dark secrets of these systems shrouded in black magic, the discussions on electroplating will seem like brain surgery. In this next series of columns, the intricacies of electrodeposition technology and its function of building up the thickness of copper in the holes and on the surface will be presented in detail. Function of the active ingredients in the copper plating solutions will be presented. Process control limits for the various plating solution components and the effects on deposit integrity will be discussed.
March 04, 2022

Trouble in Your Tank: Basic Fundamentals of Acid Copper Electroplating

Electroplating a printed circuit board is by no means a trivial task. Higher layer counts, smaller diameter vias (through-hole and blind), as well as higher performance material sets contribute to the greater degree of difficulty with today’s technology. So, process engineers pay close attention to the “softer” issues such as cathode current density, solution chemistry (copper sulfate and sulfuric acid concentration), and—sometimes—addition agent control.
February 28, 2022

Trouble in Your Tank: Additive, Semi-Additive and Subtractive Fabrication

It seems the operative word today is additive circuit board manufacturing, or for that matter, additive for everything. It is true that the use of additive manufacturing technology has found its way into different industries. While there may be several advantages to adopting additive technology in various industries, one should take a step back and truly assess where we are today in relation to conventional and advanced printed circuit board technology. It makes sense to understand the differences between fully additive, semi-additive, modified semi-additive (mSAP) and subtractive. In the end there are a number of options available to the fabricator and OEM to achieve high density and ultra-density circuitry to support higher end technologies including IC substrates.
February 02, 2022

Trouble in Your Tank: Surface Preparation—The Foundation of the Photoresist Imaging Process

The photoimaging process is one of the first steps in the PCB fabrication process. In order to ensure that the image of the circuitry conforms as close to the desired design as possible (i.e. lines and spaces), surface preparation of the copper foil surface is one of the most critical success factors. Employing the optimum mix of surface cleaners and microetchants will provide a clean surface with sufficient surface area to promote dry film adhesion. The fabricator has numerous options and should determine the optimum process by accounting for the type of copper foil used as well as the classes of soils to be removed. More on copper foil types in a future column.
December 27, 2021

Trouble in Your Tank: Plating Anomalies and Defects, Part 2

One of the most difficult things about trouble shooting PCB defects is getting to and understanding the root cause of defects. Many of these defects have can have multiple origins. And many may not manifest themselves in the process where the defect occurred. Thus are the perils of jumping to conclusion about the defect. Often this author gets involved in solving technical issues and the engineer at the board fabricator or OEM calls the defect an anomaly. Not really a good idea to go off trivializing the “purported anomaly.” Failure to understand the true genesis of the defect will lead to incorrect remedies to these issues. We will now present some of these defects and the possible remedies.
October 25, 2021

Trouble in Your Tank: Via Filling—Continued

In a previous column, the author presented several options with which to accomplish blind and through-hole via filling. In this edition of “Trouble in Your Tank,” filling blind and through holes with polymeric pastes will be presented.
October 07, 2021

Trouble in Your Tank: Case Study—Interconnect Defects and a Few Other Problems

For this month’s edition, we are taking a slightly different approach—that of presenting an actual case study. However, the basic principles of these columns continue.
August 24, 2021

Trouble in Your Tank: Jumping the Technology Curve Collaboration With Your Competition

Regardless of the industry where one competes, there is constant pressure to develop new products and penetrate new markets. This difficulty is heightened when your company is situated in a high-technology industry such as electronics, which requires continuous investment in equipment, infrastructure, processes and, of course, skilled workers.
August 13, 2021

Trouble in Your Tank: A Series of Questions on Price Increases

Columnist Michael Carano speaks frankly about the current state of price increases in the PCB industry, and what needs to change to stay alive.
May 27, 2021

Trouble in Your Tank: Training Your Team and Tools for Success

Columnists were asked to consider subjects such as optimizing business processes and strategy, process optimization, and training your team. From my view, developing critical thinking skills will help engineers troubleshoot technical issues and bring the issue to quick resolution, as this is certainly a good lead in to training your team.
April 26, 2021

Trouble in Your Tank: Plating Anomalies and Defects—Part 2

One of the most difficult things about trouble shooting PCB defects is getting to and understanding the root cause of defects. Many of these defects have can have multiple origins. And many may not manifest themselves in the process where the defect actually occurred.
March 29, 2021

Trouble in Your Tank: Process Defect Anomalies-Part 1—The Case of Etch Resist Attack

Troubleshooting process related defects is not as simple an exercise as we would like to believe. The printed wiring board fabrication process is a complex set of mechanical and chemical processes containing multiple steps. When even one of the process steps is not in control, end results can be disastrous. For now, the author presents a view of some defects that at first glance the origins are not obvious.
February 19, 2021

Trouble In Your Tank: Process Management and Control—Benchmarking Best Practices

Minimizing defects and improving yields is especially important as the technology is becoming ever so complicated, and additional focus must be placed on yield improvements. This is where process management and control must be front and center.
January 21, 2021

Trouble in Your Tank: A Process Engineer’s Guide to Etching Defects-Part 3

While troubleshooting everyday processing issues, final etching touches on many downstream processes. These include surface preparation, imaging, and copper surface quality. There are concerns with the etching process itself and how process issues and operating parameters impact the circuit formation quality. In this month’s edition of “Trouble in Your Tank,” the subject of etch-outs, undercut, and linewidth reduction will be presented.
December 30, 2020

Trouble in Your Tank: A Process Engineer’s Guide to Final Etching, Part 2

In last month’s column, Michael Carano presented various etching defect causes related to equipment parameters. In this month’s column, he discusses various other causes that lead to etching defects.
November 20, 2020

Trouble in Your Tank: A Process Engineer’s Guide to Final Etching, Part 1

Sure, etching of copper foil has been in existence since before through-holes were mechanically drilled. However, as circuit density has evolved into finer and finer lines and spaces, the mechanical and chemical aspects of etching copper have evolved as well. Michael Carano provides an overview of the inner layer and outer layer etching process, including chemical and mechanical aspects of the process, different chemical formulations involved, and other unique aspects of each.
October 23, 2020

Trouble in Your Tank: A Process Engineer’s Guide to Surface Prep and Dry-Film Photoresist Adhesion

One cannot underestimate the importance of surface preparation of the copper surface and its relationship to dry film adhesion. Michael Carano explains why chemical cleaning methods are favored over mechanical methods as long as copper removal rates are reduced and excessive surface roughness is avoided.
September 29, 2020

Trouble in Your Tank: A Process Engineer’s Guide to Interconnect Defects

For those associated with PCB fabrication, one of the biggest nightmares is often the infamous interconnect defect (ICD). Essentially, an ICD is a separation of the plating from the interconnect foil. In this column, Mike focuses on Type 1 ICD and D-sep.
August 29, 2020

Trouble in Your Tank: A Process Engineer’s Guide to Electroless Copper

Mike Carano highlights electroless copper plating solutions, focusing on a copper formulation based on copper chloride, EDTA, formaldehyde, and sodium hydroxide.
August 11, 2020

Trouble in Your Tank: CAF Formation—Correction of Misrepresentation of Origins and Causes

In Mike Carano's words, "In my April 2020 column in PCB007 Magazine, I incorrectly misrepresented the origins and causes of conductive anode filament (CAF) formation. This follow-up column will provide more insight and depth of knowledge on the CAF failure mode."
July 31, 2020

Trouble in Your Tank: A Process Engineer’s Guide to Advanced Troubleshooting, Part 2

Michael Carano discusses two interesting technical problems: the case of circuit open or etch-out, which will also include circuit width reduction related to undercut, and a defect that relates to extraneous copper remaining on the board. Both issues illustrate the complex nature of PWB troubleshooting and defect analysis.
June 15, 2020

Trouble in Your Tank: A Process Engineer’s Guide to Advanced Troubleshooting, Part 1

Defects may “manifest” or be detected in or after a specific operation within the PCB manufacturing process, but the underlying root cause may have occurred earlier in the process. In this column, Mike Carano focuses on several anomalies that may have their origins in process steps not normally recognized as the root cause of the issue.
May 15, 2020

Trouble in Your Tank: Lamination and Delamination

There are many reasons to get incredibly frustrated and confused when presented with complex issues related to the PCB fabrication process. Mike Carano reviews the concerns with the possibility of multilayer board delamination and the root cause or causes of the defect.
March 15, 2020

Trouble in Your Tank: Material Challenges for PCB Fabricators

Laminate materials are the building blocks on which PCBs are manufactured. Circuit board designers rely on the critical electrical properties of the materials to design the interconnect. And with the drive toward the internet of things (IoT), autonomous driving, virtual and augmented reality, material properties take on a very high level of importance.
January 15, 2020

Trouble in Your Tank: Technology Trends and Direct Metallization

HDI is not new as far as the trends go; however, HDI is now mainstream technology. Today, HDI is the fastest-growing segment of interconnect packaging used in portable products, IC, and ASIC packaging and large, complex multilayers for telecom and servers.
April 30, 2020

Trouble in Your Tank: Conductive Anode Filament (CAF) Formation

Mike Carano explains how there are two additional concerns fabricators must understand and reconcile as the circuit technology continues on the high-density curve along with the plethora of new materials to meet the technological demands: conductive anode filament (CAF) formation and wicking.
January 03, 2020

Trouble in Your Tank: Never Stop Learning

Michael Carano's father always said to him, "You should never stop learning," even when he was 40 years old. This lesson applies to the PCB manufacturing industry as well and is where constant learning and new skills development come into play. Mike introduces a few new things you can learn, both technical and soft skills.
December 12, 2019

Trouble in Your Tank: Changes and Concerns Regarding HDI Technology

One does not have to look too far back to point out some significant changes that have taken place in our industry over the past few years. Processes, materials, equipment, and board designs continue to change. If I were to pick one to focus on for this column, it would be in the ever-increasing trends toward higher circuit density. This relates to finer lines and spaces, smaller diameter blind vias, and even multilevel stacked and staggered vias. All of these changes will continue to place significant pressures on bare PCB fabricators to increase their investment and onboard new and critical skill sets.
November 15, 2019

Trouble in Your Tank: Via Hole Filling and Plugging, Part 2

In my previous column, I presented several options with which to accomplish blind and through-hole via filling. In this edition of “Trouble in Your Tank,” I will discuss filling blind vias and through-holes with polymeric pastes.
October 24, 2019

Trouble in Your Tank: Working With Flexible Circuits

Even though they are a smaller part of the circuit board industry, flex and rigid-flex circuits have been growing in popularity over the last decade, and for good reasons. These circuits are made to be thin, flexible, and durable. However, in addition to the opportunities that come with flex and rigid-flex circuits, there are also challenges. Find out more here.
September 11, 2019

Trouble in Your Tank: Via Hole Filling and Plugging, Part 1

High-density interconnect (HDI) demands that vias that do not contain component leads be plugged with either a polymeric paste or electroplated copper. In this column series, Michael Carano talks about the technology drivers for via filling/plugging in the context of HDI.
August 06, 2019

Trouble in Your Tank: Moving Into Microvias, Part 4

Copper deposit in the vias with electroless copper or alternatives, such as carbon-based direct plate processes to the vias, depends on process control, equipment design, and chemical parameters. When these are not in control, defects arise. In this installment of the column series, Mike Carano will talk about metallization for HDI blind via processing.
May 09, 2019

Trouble in Your Tank: OSP Performance—Effect of Film Thickness and Microetch

Two often overlooked performance attributes for organic solderability preservatives (OSPs) are the organic film thickness and the topography of the copper after microetch. Film thickness up to an extent is critical. However, the copper topography and surface preparation also play a role. Thus, you should not overlook the critical nature of the overall OSP film thickness. Read on.
March 20, 2019

Trouble in Your Tank: Moving Into Microvias, Part 3

If we have learned anything about moving into HDI manufacturing, it is that it takes a great deal of thought and discipline to be successful. Unfortunately, as the following bullet points delineate, all too often, the fabricator underestimates the scope of HDI and what this manufacturing strategy truly entails.
February 28, 2019

Trouble in Your Tank: Surface Preparation and Cleaning, Part 3

Surface preparation and cleaning are essential aspects of metal finishing and PCB fabrication. The PCB fabricator has several processes that fit the broad category of cleaning and surface preparation. However, the organization needs additional studies to enhance the broad portfolio of products for their respective fitness for use in today’s technology.
February 12, 2019

Trouble in Your Tank: The Art and Science of Resist Stripping, Part 2

Yes, there is some art to the resist stripping operation. However, it is more about the science. In a future column, I will present process control methods for resist stripping as well as dive into additional troublesome activities related to the process.
November 21, 2018

The Art and Science of Photoresist Stripping, Part 1

Photoresist stripping has become a complicated process due to many unique resist formulations on the market. The first part of this column series looks at some of the most common problems in photoresist stripping, and offers strategies on how to address them.
October 23, 2018

Trouble in Your Tank: Understanding Resist Lock-in and Extraneous Copper

It happens when you least expect it. You think you have all the process controls in place to prevent issues after etching, but either copper remains where there should be none or photoresist remains on the copper.
September 12, 2018

Trouble in Your Tank: A Tale of Zinc Tails

It is a given that the zinc tail can have a negative impact on PTH thermal reliability. Therefore, it is best to understand how to minimize its formation, or at least provide a means to mitigate the negative effects of the zinc tail.
August 16, 2018

Trouble in Your Tank: Flexible Metalization, Part II

In previous columns and elsewhere in literature, concerns about electroless copper peeling from polyimide material have been reported. The main concern with is the creation of a void caused by peeling or blistering.
August 09, 2018

Trouble in Your Tank: PTH Failure Mechanisms and Using IST as a Tool, Part 1

This edition of “Trouble in Your Tank” will elucidate the difficulty of root cause defect analysis when incorrect assumptions (and thus conclusions) are made. Further, it will illustrate that when proper tools are used to study the issue, additional data is gathered that supports the actual cause of the defect.
July 16, 2018

Trouble in Your Tank: Surface Preparation and Cleaning, Part 2

Some type of cleaning and surface structuring is required in virtually every step of the printed circuit manufacturing process, from preparing the raw laminate for etch or plating resist to final assembly board cleaning before shipment. In this edition of “Trouble in Your Tank,” I will attempt to cover most of the general cleaning problems that can occur in any of these steps and, where possible, any problems unique to a specific manufacturing step.
May 25, 2018

Trouble in Your Tank: Looking at PTH Voids

Several columns have been published in this space describing the origins of voids in the plated through-hole. However, not all voiding is caused by or has its genesis in the electroless copper (PTH metalization) process.
May 03, 2018

Trouble in Your Tank: Pits and Mouse Bites, Part 3

In the first two columns in this series, the author presented two critical areas of the PCB fabrication process thought to contribute to the mouse bite and pitting defects seen in productionat a fabrication facility. In those first two parts, photoresist lamination and exposure parameters were investigated as to the possible root cause of the defects.
April 17, 2018

Trouble in Your Tank: Surface Preparation and Cleaning, Part 1

Surface preparation and cleaning are essential aspects of metal finishing and printed circuit board fabrication. The printed circuit board fabricator has several processes that fit the broad category of cleaning and surface preparation in its toolbox. It is critical that the engineer carefully evaluates these methods and processes to determine the most effective way to optimize yields.
February 15, 2018

CASE STUDY: Pits and Mouse Bite Issues, Part 2

In last month’s column, I introduced a case study that centered on plating pits and mouse bites. There were three areas in the process that raised concern as to the potential root cause of the defect. Of course, as with the case in all troubleshooting situations, it is best to look at the problem with wide open eyes. Just because one is looking at an issue that is visible after copper plating, this should not mean that is the only place to look. And this case study illustrates that point quite clearly.
December 01, 2017

Trouble in Your Tank: Moving into Microvias—The Interaction of Materials and Processes, Part 2

Most of the dielectric materials that are used to make printed circuit boards incorporate reinforcement into the resin system. Reinforcement usually takes the form of woven glass fiber. Woven fiberglass is just like any other cloth, made up of individual filaments that are woven together on a loom.
November 10, 2017

Trouble in Your Tank: The Critical Importance of Rinsing, Part 2

In Part 1 of this series on the importance of rinsing, the author presented an overview of the critical aspects of rinsing as it applies to the overall quality of a printed circuit board, with considerable space devoted to water conservation. Thus, we now turn to how one can improve rinsing effectiveness without increasing water consumption and, by default, significant waste treatment costs.
August 23, 2017

Trouble in Your Tank: Moving into Microvias—The Interaction of Materials and Processes, Part 1

In the first part of a series of columns focused on microvias, the importance of adopting HDI technology as a strategic initiative for the PWB fabricator is presented. The major drivers for HDI are listed.
July 14, 2017

Trouble in Your Tank: The Critical Importance of Rinsing, Part 1

In nearly every chemical process step in the PCB industry, rinsing is an immediate and required process step. Rinsing is typically a crucial step following a chemical process, and is thought to be one that requires little or no attention to function properly. However, problems caused by ineffective rinsing are responsible for many rejects, as well as huge operating costs in the waste treatment department.
May 16, 2017

Trouble in Your Tank: The Desmear Defect Guide

Inadequate or excessive desmear will lead to several PTH defects and failures. Resin smear, ineffective texturing of the resin, and even overly aggressive desmear will contribute to poor plating, adhesion failures and a myriad of other non-conforming defects. However, proper troubleshooting protocol dictates that the engineer also looks at drilling as the contributor to these and other defects.
May 09, 2017

Trouble in Your Tank: Copper-to-Copper Peeling

Follow good shop practices in terms of surface preparation, electroless copper plating thickness and resist developing parameters. Optimal surface preparation utilizing cleaners and micro-etches is critical to eliminating copperto-copper peeling. In addition, over- and underdeveloping create their own set of process constraints. Pay very close attention to developer pH, operating temperature and break point
March 16, 2017

Improving Solderability and Corrosion Resistance for Final Finishes, Part 1

The process of forming a reliable solder joint between the component and the printed circuit board is paramount with respect to the manufacturing of robust circuit board assemblies.
February 23, 2017

Trouble in Your Tank: Metalizing Difficult-to-Plate Substrates

Metalizing materials such as polyimide used for flexible circuitry provides a significant challenge for process engineers. Conventional electroless copper systems often required pre-treatments with hazardous chemicals or have a small process window to achieve a uniform coverage without blistering.
February 23, 2017

Trouble in Your Tank: Acid Copper Plating

Electroplating a printed circuit board is by no means a trivial task. Higher layer counts, smaller-diameter vias (through-hole and blind) as well as higher-performance material sets contribute to the greater degree of difficulty with today’s technology.
December 27, 2016

Trouble in Your Tank: Via Formation and Mechanical Drilling, Part 2

In this month’s installment of Trouble in Your Tank, I will further explore the critical drilling parameters required to drill a “good hole” and provide information on some little-known parameters required for this operation.
November 28, 2016

Trouble in Your Tank: Via Formation and Drilling Mechanics, Part 1

In the extensive process of printed circuit board fabrication, one of the steps involves mechanically drilling through-hole vias. Via formation is then followed by desmear and metallization. The quality of the through-hole drilling process (and by inference the quality of the drilled through-hole) or lack thereof will also impact the desmear and metalization processes.
November 02, 2016

Case Study: Plating Nodules— Where Did These Come From?

Introduction Sometimes the problems can really get pretty ugly. One would assume these uglies would be easy to correct. But most often, solving such a problem requires a much deeper dig into the process.
October 13, 2016

Trouble in Your Tank: Case Study: Plating Nodules— Where Did These Come From?

Sometimes the problems can really get pretty ugly. One would assume these uglies would be easy to correct. But most often, solving such a problem requires a much deeper dig into the process.
August 17, 2016

Trouble in Your Tank: Building Reliability into the PCB, Part 2

In Part 1 of this column on reliability, I presented the common PTH failures encountered when reliability is less than robust. PTH reliability is influenced by several factors including the quality of the PTH after drilling, plating thickness and plating distribution in the PTH. In this column, I will present additional factors, including the Coffin-Manson model in the context of understanding reliability failures.
July 20, 2016

Building Reliability into the PCB, Part 1

Sometimes there is confusion among PCB engineers and quality managers as to what constitutes reliability. Some may say that reliability refers to avoiding PTH failures such as corner cracks or interconnect defects. Then there are those who subscribe to a wider range of failure criteria to determine whether or not the final product is reliable for long-term service.
May 14, 2016

Trouble in Your Tank: Primary Imaging for Pattern Plating, Part 1

It is the job of the PCB process engineer to ensure that a quality circuit is delivered. This process starts with sound mechanics of the im-aging system that include surface cleanliness and resist lamination parameters.
June 14, 2016

Primary Imaging for Pattern Plating, Part 2—Development

The proper development of the primary photoresist is critical to the overall success of the imaging process and in turn the processes that follow—either etching to form innerlayers or the electroplating processes on outer layers. In this step, the unexposed photoresist (after resist lamination and exposure) is washed away via the developing process.
May 18, 2015

Copper Discoloration and Other Concerns with OSP

Getting the OSP process to perform as it is intended requires attention to both the equipment operating parameters as well as chemistry. This month's "Trouble in Your Tank" delves into one of the most irritating issues with respect to OSP: discoloration (read "oxidation") on critical circuit features.
April 21, 2015

More Pesky Solder Mask Problems: Plugged Via Leading to Skip Plating

Many factors are in play when it comes to preventing ink from remaining in vias. In this article, Michael Carano presents two factors: solder not flowing in the vias and the lack of a plated solderable finish in the vias. This may be because some of the vias have a final finish in them and others do not--and all of these are happening on the same boards!
March 24, 2015

Fine Lines and Spaces with Half-Etch Processes

Half-etch technology is production proven in meeting high density circuitry requirements. Thinner copper is effective in achieving sub-35 micron lines and spaces due to the total copper thickness that must be etched.
January 06, 2015

Getting to the Root Cause - Solderability Defect Analysis

In this case study, a PCB fabricator investigates the root cause of solderability defects on ENIG-processed circuits. It was determined that the fabricator, due to process errors, caused hyper-corrosion within the nickel deposit, which led to the defects.
December 02, 2014

Trouble in Your Tank: Oxide Alternatives to Enhance LPI Adhesion to Copper

The aggressive nature of the ENIG process is a particular nuisance for some aqueous-based LPIs. Simply scrubbing the copper surface prior to soldermask application is often not an effective adhesion promotion mechanism for LPI and ENIG. Before exploring surface topography further, it is important to understand outside influences such as ENIG and its effect on adhesion.
November 11, 2014

Trouble in Your Tank: Root Cause of Failures in PWB Lamination

Understanding the interactions of the materials, oxide treatment, and the lamination process will help you get to the root cause failures in multilayer fabrication. When troubleshooting multilayer defects, it is necessary to understand the effect certain process parameters have on quality and reliability. Truly, the quality of a multilayer PCB (prior to desmear/metallization) will depend on several factors presented in this column.
September 23, 2014

Trouble in Your Tank: Controlling the ENIG Process for Optimum Efficiency and Performance

Ideally, the ENIG process must provide the optimum in solder joint reliability while operating at the highest level of cost efficiency. All too often, process parameters that have the most influence on these critical attributes are poorly understood.
June 19, 2014

Trouble in Your Tank: PTH Drilling Revisited - Fundamentals, Part 1

The basic fundamentals of PTH drilling revolve around several key factors: 1) speeds and feeds--drill in-feed rate and spindle speed of the drill bit; 2) surface feet per minute; and 3) the material to be drilled. Understanding and applying these first few critical factors will influence the overall quality of the drilled, plated through-hole.
March 04, 2014

Trouble in Your Tank: Fine Lines and Spaces, Part 3: Chemical Surface Preparation

The photoimaging process is one of the first steps in the PCB fabrication process. To ensure the image of the circuitry conforms as close to the desired design as possible, preparation of the copper foil surface is a critical success factor. Employing the optimum mix of surface cleaners and microetchants will provide a clean surface with sufficient area to promote dry film adhesion.
October 29, 2013

Trouble in Your Tank: Optimizing the Soldermask Process, Part 3

In Part 1 and 2 of this series, Columnist Michael Carano presented critical information on ink properties, methods of soldermask application, tack drying, and more. In Part 3, the exposure process is detailed, including exposure units, UV lamps, the phototool, and overall exposure energy.
October 22, 2013

Trouble in Your Tank: Electroless Copper and D-Sep

In past columns, Michael Carano presented information about the different types of ICD interconnect defect and its root causes. One key defect that was not discussed is the infamous D-sep. What exactly is D-sep? Carano will explore this issue and provide suggestions for process improvement so you don't experience D-sep on your expensive, high-reliability PCBs.
September 24, 2013

Trouble in Your Tank: PTH Voids: Getting to the Root Cause, Part 3

Achieving a void-free deposit through the PTH line need not be an elusive goal. Instead, careful thought should be given to line design and the critical interactions of chemical parameters. In addition, the fabricator and supplier must work closely to ensure high-performance materials can be processed with the highest levels of reliability.
August 26, 2013

Trouble in Your Tank: PTH Voids: Getting to the Root Cause, Part 2

Both a reduced oxide process and an alternative oxide enhance the bond strength between the prepreg resin and the copper. In addition, the treated foil, if exposed by the wedge, is better able to stave off dissolution from the many acidic process steps to which the PWB will be subjected.
July 18, 2013

Trouble in your Tank: Optimizing the Liquid Photoimageable Soldermask Process, Part 1

The soldermask is an integral part of the circuit board. The proper application of soldermask requires strict attention to detail. This first article of a two-part series elucidates the critical operational requirements of the photoimageable soldermask process.
June 03, 2013

Trouble in Your Tank: Negative Etchback: Is it Really OK?

Negative etchback is not a non-conforming defect according to IPC-600 (within limits). Acceptable levels of negative etchback do exist; however, there is a downside that can affect the overall plating quality in the PTH.
May 21, 2013

Trouble in Your Tank: The Root Cause of ICDs, Part II

This case study from Michael Carano emphasizes the critical thinking required to solve complex technical issues related to innerconnect defect. The defect described relates to drilling and inadequate drill smear removal, as opposed to plating as the root cause of the innerplane separation.
June 13, 2013

Trouble in Your Tank: Those Problematic Soldermask Issues

Michael Carano writes, "I'm sure you've heard the words, 'It's not rocket science.' Apologies to the rocket scientists, but sometimes PCB fabrication just makes it look that way. This column approaches soldermask adhesion using an actual case study."
January 18, 2013

Trouble in Your Tank: What Pushed the Tech Envelope in 2012 and a Look at 2013

With increased growth rates for HDI, lesser known technologies are being adopted, including three critical solderable finish processes: Acid copper superfilling of blind vias, paste interconnect, and direct electroless palladium over copper.
January 10, 2013

Trouble in Your Tank: Interconnect Defect (ICD): Getting to the Root Cause

Interconnect defect (ICD), a.k.a. innerplane separation, is one of the most difficult technical problems to troubleshoot in PCB fabrication. This month, Trouble in Your Tank presents an actual case history and analysis of the problem.
December 11, 2012

Trouble in Your Tank: Pesky Peeling & Lifting Soldermask Issues

Soldermask can peel or lift off areas on a PCB for a variety of reasons. This edition of "Trouble in Your Tank" presents the causes of soldermask peeling and lifting and stresses the importance of surface preparation prior to mask application.
September 22, 2011

Trouble in Your Tank: More ENIG Process Issues & Defects

In previous columns related to the electroless nickel-immersion gold process, Michael Carano focused on plating and process defects related to mostly pre-plate process steps such as poor or inadequate cleaning, micro-etching and rinsing. This month, he tackles additional annoyances that lead to scrap and reduce the confidence in the ENIG process.
December 10, 2013

Achieving Fine Lines and Spaces, Part 1

Circuit designs with three-mil lines and spaces are increasingly becoming the norm. Optimizing the imaging process should be of paramount concern. Over the next few months, Mike Carano will present the critical steps in the imaging process and provide insight as to where potential yield reducing defects can occur and how to prevent them.
January 21, 2014

Achieving Fine Lines and Spaces, Part 2

Achieving high yields with fine lines and spaces requires a good understanding of surface preparation methods says columnist Michael Carano. These include pumice and chemical cleaning. In essence, the surface profile of roughness plays a role in resist adhesion.
March 04, 2014

Fine Lines and Spaces, Part 3: Chemical Surface Preparation

The photoimaging process is one of the first steps in the PCB fabrication process. To ensure the image of the circuitry conforms as close to the desired design as possible, preparation of the copper foil surface is a critical success factor. Employing the optimum mix of surface cleaners and microetchants will provide a clean surface with sufficient area to promote dry film adhesion.
March 25, 2014

Oxide vs. Oxide Alternative Chemistry for High-Performance Resin Systems, Part 1

Columnist Michael Carano explains: "Grequent visits to Asia have shown me that oxide chemistry is alive and well. So before dedicating the next few columns to oxide alternative chemistry, it would be appropriate to present the current state of conventional oxide. I can honestly say that the death of conventional-reduced oxide has been greatly exaggerated."
May 06, 2014

Oxide vs. Oxide Alternative, Part 2

In his last column, Mike Carano presented an overview of conventional oxide chemistry and the critical success factors of the process. In this column, he begins a review of the oxide alternative process that is often referred to as an organo-metallic coating process. The reason for this alternative name will be explained here.
June 19, 2014

PTH Drilling Revisited - Fundamentals, Part 1

The basic fundamentals of PTH drilling revolve around several key factors: 1) speeds and feeds--drill in-feed rate and spindle speed of the drill bit; 2) surface feet per minute; and 3) the material to be drilled. Understanding and applying these first few critical factors will influence the overall quality of the drilled, plated through-hole.
August 12, 2014

The Degrees of Nickel Hyper-corrosion and Mitigation Strategies

Columnist Michael Carano presents additional information about nickel hyper-corrosion, a spike or fissure in the nickel deposit evident after immersion gold plating, by further defining the five degrees of hyper-corrosion. He also explores the root causes of such attacks on the base nickel along with strategies to mitigate these effects.
September 11, 2014

Oxide Alternative Processes

Columnist Michael Carano writes, "It is all about optimizing the performance of the oxide alternative chemistry. This includes close monitoring of the main reactive ingredients of the process chemistry. And one of the first issues that the industry had to address, whether one is using reduced oxide chemistry or oxide alternatives, is pink ring."
November 11, 2014

Root Cause of Failures in PWB Lamination

Understanding the interactions of the materials, oxide treatment, and the lamination process will help you get to the root cause failures in multilayer fabrication. When troubleshooting multilayer defects, it is necessary to understand the effect certain process parameters have on quality and reliability. Truly, the quality of a multilayer PCB (prior to desmear/metallization) will depend on several factors presented in this column.
December 02, 2014

Oxide Alternatives to Enhance LPI Adhesion to Copper

The aggressive nature of the ENIG process is a particular nuisance for some aqueous-based LPIs. Simply scrubbing the copper surface prior to soldermask application is often not an effective adhesion promotion mechanism for LPI and ENIG. Before exploring surface topography further, it is important to understand outside influences such as ENIG and its effect on adhesion.
December 23, 2014

Lead-free Compatible OSPs: What Does This Really Mean?

While next-generation OSP as a final finish has become the standard for lead-free compatible assembly, one should assume that any new OSP meets the criteria. A number of simple procedures may be followed to qualify any new OSP and ensure it is compatible with these higher assembly temperatures. Columnist Michael Carano takes a closer look.
September 23, 2014

Controlling the ENIG Process for Optimum Efficiency and Performance

Ideally, the ENIG process must provide the optimum in solder joint reliability while operating at the highest level of cost efficiency. All too often, process parameters that have the most influence on these critical attributes are poorly understood.
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